Keerthikumara Devarajegowda

33 papers A* 4A 5C 7Journal 4Unranked 12

Year	Rank	Type	Title / Venue / Authors
2024	A*	`conf`	MCU-Wide Timing Side Channels and Their Detection. DAC Johannes Müller, Anna Lena Duque Antón, Lucas Deutschmann, Dino Mehmedagic, Cristiano Rodrigues, Daniel Oliveira, Mohammad Rahmani Fadiheh, Keerthikumara Devarajegowda, Sandro Pinto, Dominik Stoffel, Wolfgang Kunz
2023	A*	`conf`	G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators. DAC Saranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra
2023	—	`conf`	Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation. MCSoC Endri Kaja, Nicolas Gerlin, Robert Kunzelmann, Keerthikumara Devarajegowda, Wolfgang Ecker
2022	—	`conf`	A Scalable, Configurable and Programmable Vector Dot-Product Unit for Edge AI. MBMV Sebastian Prebeck, Sathya Ashok, Mounika Vaddeboina, Keerthikumara Devarajegowda, Wolfgang Ecker
2022	C	`conf`	Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. VLSI-SoC Nicolas Gerlin, Endri Kaja, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2022	C	`conf`	Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. VLSI-SoC Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2022	J	`jnl`	MetFI: Model-driven Fault Simulation Framework. CoRR Endri Kaja, Nicolas Gerlin, Luis Rivas, Monideep Bora, Keerthikumara Devarajegowda, Wolfgang Ecker
2022	—	`conf`	MetaFS: Model-driven Fault Simulation Framework. DFT Endri Kaja, Nicolas Gerlin, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker
2021	C	`conf`	Aspect-Oriented Design Automation with Model Transformation. VLSI-SoC Zhao Han, Deyan Wang, Gabriel Rutsch, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, Wolfgang Ecker
2021	—	`conf`	Extending Verilator to Enable Fault Simulation. MBMV Endri Kaja, Nicolas Ojeda Leon, Michael Werner, Bogdan-Andrei Tabacaru, Keerthikumara Devarajegowda, Wolfgang Ecker
2021	A*	`conf`	ISA Modeling with Trace Notation for Context Free Property Generation. DAC Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker
2021	—	`—`	Model-based Generation of Assertions for Pre-silicon Verification. Keerthikumara Devarajegowda
2021	—	`conf`	On Self-Verifying DSL Generation for Embedded Systems Automation. MBMV Zhao Han, Shahzaib Qazi, Michael Werner, Keerthikumara Devarajegowda, Wolfgang Ecker
2021	—	`conf`	Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. DFT Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker
2021	—	`conf`	Transformative Hardware Design Following the Model-Driven Architecture Vision. VLSI-SoC (Selected Papers) Zhao Han, Gabriel Rutsch, Deyan Wang, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, Wolfgang Ecker
2020	J	`jnl`	Accurate Cost Estimation of Memory Systems Utilizing Machine Learning and Solutions from Computer Vision for Design Automation. IEEE Trans. Computers Lorenzo Servadei, Edoardo Mosca, Elena Zennaro, Keerthikumara Devarajegowda, Michael Werner, Wolfgang Ecker, Robert Wille
2020	—	`conf`	Cost Estimation for Configurable Model-Driven SoC Designs Using Machine Learning. ACM Great Lakes Symposium on VLSI Lorenzo Servadei, Edoardo Mosca, Keerthikumara Devarajegowda, Michael Werner, Wolfgang Ecker, Robert Wille
2020	A	`conf`	Gap-free Processor Verification by S DATE Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz
2019	A	`conf`	Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision. DATE Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Martin Manzinger, Wolfgang Ecker, Robert Wille
2019	A	`conf`	Embedded Systems' Automation following OMG's Model Driven Architecture Vision. DATE Wolfgang Ecker, Keerthikumara Devarajegowda, Michael Werner, Zhao Han, Lorenzo Servadei
2019	C	`conf`	Formal Verification Methodology in an Industrial Setup. DSD Lorenzo Servadei, Zhao Han, Michael Werner, Wolfgang Ecker, Keerthikumara Devarajegowda
2019	—	`conf`	How to Keep 4-Eyes Principle in a Design and Property Generation Flow. MBMV Keerthikumara Devarajegowda, Wolfgang Ecker, Wolfgang Kunz
2019	A*	`conf`	Increasing Soft Error Resilience by Software Transformation. DAC Michael Werner, Keerthikumara Devarajegowda, Moomen Chaari, Wolfgang Ecker
2019	A	`conf`	Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. DATE Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
2019	J	`jnl`	Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. CoRR Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon, Ralf Schnieder, Karthik Ganesan, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz, Clark W. Barrett, Wolfgang Ecker, Subhasish Mitra
2019	—	`conf`	Towards a Python-Based One Language Ecosystem for Embedded Systems Automation. NORCAS Zhao Han, Keerthikumara Devarajegowda, Michael Werner, Wolfgang Ecker
2019	J	`jnl`	Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications. Microprocess. Microsystems Lorenzo Servadei, Elena Zennaro, Tobias Fritz, Keerthikumara Devarajegowda, Wolfgang Ecker, Robert Wille
2018	C	`conf`	A Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications. DSD Elena Zennaro, Lorenzo Servadei, Keerthikumara Devarajegowda, Wolfgang Ecker
2018	C	`conf`	Meta-model Based Automation of Properties for Pre-Silicon Verification. VLSI-SoC Keerthikumara Devarajegowda, Wolfgang Ecker
2018	—	`conf`	Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning. CIMA@ICTAI Lorenzo Servadei, Elena Zennaro, Keerthikumara Devarajegowda, Wolfgang Ecker, Robert Wille
2017	—	`conf`	On generation of properties from specification. HLDVT Keerthikumara Devarajegowda, Wolfgang Ecker
2017	A	`conf`	Python based framework for HDSLs with an underlying formal semantics: (Invited paper). ICCAD Keerthikumara Devarajegowda, Johannes Schreiner, Rainer Findenig, Wolfgang Ecker
2017	C	`conf`	The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping. RSP Daniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann