Kazuyuki Wada

32 papers C 9Journal 15Unranked 8
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Load Voltage Estimation and Regulation System for Wireless Power Transfer with Optimum Matching Circuit Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Takahiro Fujita, Kazuyuki Wada
2025 — conf
Design of an Analog Integrated Circuit Solving the Two-Armed Bandit Problem in 180-nm CMOS.
AICAS
Kohei Mori, Kazuyuki Wada, Kawori Sekine, Shinsuke Hara, Satoru Tanoi, Akifumi Kasamatsu
2025 — conf
Enhanced Voltage Reference Circuit Design Using Quadratic Function Modeling of MOSFET Characteristics in the Saturation Region.
ICECS
Shuya Isawa, Kawori Sekine, Kazuyuki Wada, François Rivet, Hervé Lapuyade, Yann Deval
2024 C conf
A Low-Power Lock-in Amplifier Suitable for Implementation on a Programmable System on-Chip.
ISCAS
Takahiro Fujita, Kazuyuki Wada
2024 J jnl
An Output Voltage Estimation and Regulation System Using Only the Primary-Side Electrical Parameters for Wireless Power Transfer Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Takahiro Fujita, Kazuyuki Wada, Kawori Sekine
2021 J jnl
Unitary equivalence classes of split-step quantum walks.
Quantum Inf. Process.
Akihiro Narimatsu, Hiromichi Ohno, Kazuyuki Wada
2020 J jnl
A weak limit theorem for a class of long-range-type quantum walks in 1d.
Quantum Inf. Process.
Kazuyuki Wada
2018 J jnl
Multilevel pre-equalization using an analog FIR filter with multiple binary delay lines for 20-Gb/s 4-PAM multimode fiber transmission.
IEICE Electron. Express
Ryoichiro Nakamura, Kenta Amino, Kawori Sekine, Kazuyuki Wada, Moriya Nakamura
2017 — conf
Analog FIR filter derived from the generating function for the Bernoulli numbers.
NEWCAS
Yoshitaka Kitani, Kazuyuki Wada, Kawori Sekine, Moriya Nakamura
2009 J jnl
A 0.6-V Dynamic Biasing Filter With 89-dB Dynamic Range in 0.18-µm CMOS.
IEEE J. Solid State Circuits
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
2009 C conf
Multi-path Filters Robust to Substrate Noise and Nonlinearity.
ISCAS
Kazuyuki Wada, Yukiya Kiyokawa, Retdian Agung Nicodimus, Shigetaka Takagi, Takahide Sato, Nobuo Fujii
2008 J jnl
A 0.8-V Syllabic-Companding Log Domain Filter with 78-dB Dynamic Range in 0.35-µm CMOS.
IEICE Trans. Electron.
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
2008 J jnl
Multi-Path Analog Circuits Robust to Digital Substrate Noise.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shigetaka Takagi, Retdian Agung Nicodimus, Kazuyuki Wada, Takahide Sato, Nobuo Fujii
2007 J jnl
Band Connections for Digital Substrate Noise Reduction Using Active Cancellation Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hiroto Suzuki, Kazuyuki Wada, Yoshiaki Tadokoro
2007 C conf
Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter.
ISCAS
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
2007 J jnl
Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
2006 C conf
Band connections in active cancellation circuits against digital substrate noise.
ISCAS
Hiroto Suzuki, Kazuyuki Wada, Yoshiaki Tadokoro
2006 C conf
Low-voltage CMOS syllabic-companding log domain filter.
ISCAS
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
2006 C conf
Minimization of total area in integrated active RC filters.
ISCAS
Kazuyuki Wada, Randall L. Geiger
2005 J jnl
Active Shield Circuit for Digital Noise Suppression in Mixed-Signal Integrated Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Retdian Agung Nicodimus, Shigetaka Takagi, Kazuyuki Wada
2005 J jnl
Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise Evaluation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Retdian Agung Nicodimus, Hiroto Suzuki, Kazuyuki Wada, Shigetaka Takagi
2003 — conf
RC polyphase filter with flat gain characteristic.
ISCAS (1)
Kazuyuki Wada, Yoshiaki Tadokoro
2002 — conf
Design of a body-effect reduced-source follower and its application to linearization technique.
ISCAS (3)
Kazuyuki Wada, Yoshiaki Tadokoro
2002 J jnl
Extension of Current Conveyor Concept and Its Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Takahide Sato, Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
2002 J jnl
Fully On-Chip Active Guard Band Circuit for Digital Noise Cancellation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shigetaka Takagi, Retdian Agung Nicodimus, Kazuyuki Wada, Nobuo Fujii
2002 J jnl
Wide-Input Range Linear Voltage-to-Current Converter Using Equivalent MOSFETs without Cutoff Region.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
2001 — conf
Active guard band circuit for substrate noise suppression.
ISCAS (1)
Shigetaka Takagi, Nicodimus Retdian Agung, Kazuyuki Wada, Nobuo Fujii
2000 C conf
A novel class A CMOS current conveyor.
ISCAS
Sohrab Emami, Kazuyuki Wada, Shigetaka Tagaki, Nobuo Fujii
2000 C conf
Novel voltage-regulating circuit for low-voltage and low-power OTA realization using MOSFETs in the non-saturation region.
ISCAS
Takahide Sato, Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
2000 C conf
Power saving technique for MOS differential amplifiers.
ISCAS
Kyoichi Takenaka, Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
1998 — conf
Reduction in output DC offset voltage of integrator-based filters.
ICECS
Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii
1995 — conf
Design automation for integrated continuous-time filters using integrators.
ASP-DAC
Kazuyuki Wada, Shigetaka Takagi, Zdzislaw Czarnul, Nobuo Fujii