Kazunori Watanabe

13 papers A 1B 1Journal 4Unranked 7
YearRankTypeTitle / Venue / Authors
2014 J jnl
A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS.
IEEE J. Solid State Circuits
Xin Zhang, Po-Hung Chen, Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2014 J jnl
Design Method of Class-F Power Amplifier With Output Power of -20 dBm and Efficient Dual Supply Voltage Transmitter.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shunta Iguchi, Akira Saito, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2013 — conf
315MHz OOK transceiver with 38-µW receiver and 36-µW transmitter in 40-nm CMOS.
ASP-DAC
Shunta Iguchi, Akira Saito, Kentaro Honda, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2013 — conf
A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS.
ASP-DAC
Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012 A conf
0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS.
ISLPED
Akira Saito, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012 — conf
2.1 Times increase of drain efficiency by dual supply voltage scheme in 315MHz class-F Power amplifier at output power of -20dBm.
ESSCIRC
Shunta Iguchi, Akira Saito, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012 — conf
A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90% efficiency in load range from 2µW to 50µW.
VLSIC
Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012 J jnl
A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation.
IEEE Trans. Circuits Syst. II Express Briefs
Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012 — conf
An all 0.5V, 1Mbps, 315MHz OOK transceiver with 38-µW career-frequency-free intermittent sampling receiver and 52-µW class-F transmitter in 40-nm CMOS.
VLSIC
Akira Saito, Kentaro Honda, Yun Fei Zheng, Shunta Iguchi, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2011 J jnl
0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS.
IEICE Trans. Electron.
Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai
2010 — conf
0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS.
CICC
Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai
1998 B conf
An adaptive array antenna using combined DFT and LMS algorithms.
PIMRC
Kazunori Watanabe, Isamu Yoshii, Ryuji Kohno
1984 — conf
Splicing of Single-Mode Optical Fibers and Jointing of Fiber Cables.
ICC (3)
Shigeru Tachigami, Shozo Inao, Hisaharu Yanagawa, Kazunori Watanabe, Yoshio Tsuchida, Isao Minamida