Kazunori Shimizu

17 papers A 1C 2Journal 7Unranked 7
YearRankTypeTitle / Venue / Authors
2012 — conf
Development of in vivo gene delivery methods in mice using tissue suction devices for abdominal endoscopic gene therapy.
MHS
Kazunori Shimizu, Shigeru Kawakami, Kouji Hayashi, Shingo Katano, Guangyuan Zhang, Dai Maekawa, Mitsuru Hashida, Satoshi Konishi
2012 — conf
Frequency and Link Analysis of Online Novels Toward Social Contents Ranking.
CGC
Eisuke Ito, Kazunori Shimizu
2012 — conf
Introducing faceted views in diversity of online novels.
ICDIM
Eisuke Ito, Sachio Hirokawa, Kazunori Shimizu
2008 J jnl
A 41 mW VGA@30 fps Quadtree Video Encoder for Video Surveillance Systems.
IEICE Trans. Electron.
Qin Liu, Seiichiro Hiratsuka, Kazunori Shimizu, Shinsuke Ushiki, Satoshi Goto, Takeshi Ikenaga
2008 J jnl
Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2008 — conf
Scalable unified dual-radix architecture for Montgomery multiplication in GF(P) and GF(2
ASP-DAC
Kazuyuki Tanimura, Ryuta Nara, Shunitsu Kohara, Kazunori Shimizu, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki
2007 J jnl
Efficient Fully-Parallel LDPC Decoder Design with Improved Simplified Min-Sum Algorithms.
IEICE Trans. Electron.
Qi Wang, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto
2007 A conf
Power-efficient LDPC code decoder architecture.
ISLPED
Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2006 C conf
A parallel LSI architecture for LDPC decoder improving message-passing schedule.
ISCAS
Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2006 — conf
High-throughput decoder for low-density parity-check code.
ASP-DAC
Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto
2006 — conf
Memory-Efficient Accelerating Schedule for LDPC Decoder.
APCCAS
Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2006 J jnl
Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2006 J jnl
Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2005 C conf
Partially-Parallel LDPC Decoder Based on High-Efficiency Message-Passing Algorithm.
ICCD
Kazunori Shimizu, Tatsuyuki Ishikawa, Takeshi Ikenaga, Satoshi Goto, Nozomu Togawa
2005 J jnl
Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving.
IEICE Trans. Inf. Syst.
Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
2005 — conf
Reconfigurable adaptive FEC system with interleaving.
ASP-DAC
Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
1999 J jnl
High-speed End Milling of Extruded Aluminum Alloys Using Articulated Robot.
J. Robotics Mechatronics
Kazunori Shimizu, Shin-ichi Matsuoka, Nobuyuki Yamazaki, Yoshinari Oki