Kazuki Monta

15 papers A* 1B 1C 1Journal 2Unranked 10
YearRankTypeTitle / Venue / Authors
2025 — conf
ML-EMFI: A Machine Learning-Driven Pre-Silicon Electromagnetic Fault Injection Security Evaluation for Robust IC Design.
HOST
Pantha Protim Sarker, Tianze Kan, Jingchen Liang, Ozgur Tuncer, Bo He, Zelin Lu, Sudarshan Mallu, Lang Lin, Norman Chang, Rikuu Hasegawa, Kazuki Monta, Makoto Nagata, Farimah Farahmandi, Mark Tehranipoor
2024 — conf
A Hybrid Simulation Approach for Accurate and Fast System-Level Side-Channel Leakage Evaluation.
AsianHOST
Kazuki Monta, Takafumi Oki, Rikuu Hasegawa, Takuya Wadatsumi, Takuji Miki, Makoto Nagata, Lang Lin, Norman Chang
2024 C conf
Fault Injection Attacks Exploiting High Voltage Pulsing over Si-Substrate Backside of IC chips.
FDTC
Yusuke Hayashi, Rikuu Hasegawa, Takuya Wadatsumi, Kazuki Monta, Takuji Miki, Makoto Nagata
2024 — conf
Modeling and Analysis of On-Chip Voltage Fluctuations Caused by Electromagnetic Fault Injection.
EMC Compo
Takuya Wadatsumi, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Lang Lin, Norman Chang, Makoto Nagata
2024 — conf
On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injection.
COSADE
Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata
2024 — conf
Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-Channel Simulation.
HOST
Henian Li, Lang Lin, Norman Chang, Sreeja Chowdhury, Dylan Mcguire, Bozidar Novakovic, Kazuki Monta, Makoto Nagata, Ying-Shiun Li, Pramod M. S, Piin-Chen Yeh, Jyh-Shing Roger Jang, Chengjie Xi, Qiutong Jin, Navid Asadi, Mark Tehranipoor
2024 — conf
Si-Backside Side-Channel Leakage Measurement and Simulation.
ISOCC
Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata, Lang Lin, Akhilesh Kumar, Norman Chang
2024 — conf
Thermal Flow Simuation and Measurements of 3D Si Chip Stacks with TSVs.
3DIC
Shuhei Yokota, Rikuu Hasegawa, Kazuki Monta, Takaaki Okidono, Takuji Miki, Makoto Nagata
2023 — conf
Characterization of Backside ESD Impacts on Integrated Circuits.
IRPS
Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Makoto Nagata
2023 A* conf
On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits.
DAC
Kazuki Monta, Makoto Nagata, Josep Balasch, Ingrid Verbauwhede
2023 J jnl
Silicon-correlated Simulation Methodology of EM Side-channel Leakage Analysis.
ACM J. Emerg. Technol. Comput. Syst.
Kazuki Monta, Lang Lin, Jimin Wen, Harsh Shrivastav, Calvin Chow, Hua Chen, Joao Geada, Sreeja Chowdhury, Nitin Pundir, Norman Chang, Makoto Nagata
2022 J jnl
Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements.
IEEE Des. Test
Kazuki Monta, Leonidas Katselas, Ferenc Fodor, Takuji Miki, Alkis A. Hatzopoulos, Makoto Nagata, Erik Jan Marinissen
2021 — conf
Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification.
HOST
Lang Lin, Deqi Zhu, Jimin Wen, Hua Chen, Yu Lu, Norman Chang, Calvin Chow, Harsh Shrivastav, Chia-Wei Chen, Kazuki Monta, Makoto Nagata
2021 B conf
Testing Embedded Toggle Pattern Generation Through On-Chip IR Drop Monitoring.
ETS
Kazuki Monta, Leonidas Katselas, Ferenc Fodor, Alkis A. Hatzopoulos, Makoto Nagata, Erik Jan Marinissen
2020 — conf
Fast and Comprehensive Simulation Methodology for Layout-Based Power-Noise Side-Channel Leakage Analysis.
iSES
Lang Lin, Dinesh Selvakumaran, Deqi Zhu, Norman Chang, Calvin Chow, Makoto Nagata, Kazuki Monta