Kazuki Fukuoka

15 papers Journal 4Unranked 11

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A 3nm, 400TOPS, 1080k DMIPS SoC with Chiplet Support for ASIL D Automotive Cross-Domain Applications. ISSCC Shiro Machida, Kazuki Fukuoka, Tomoya Onda, Nobuhiro Yada, Hiroyuki Nakano, Sho Yamanaka, Hung Van Cao, Yusaku Hara, Takahiro Irita, Kohei Wakahara, Cyril Cordoba, Tatsuya Kamei, Yasuhisa Shimazaki
2023	—	`conf`	A 33kDMIPS 6.4W Vehicle Communication Gateway Processor Achieving 10Gbps/W Network Routing, 40ms CAN Bus Start-Up and 1.4mW Standby Power. ISSCC Kenichi Shimada, Keiichiro Sano, Kazuki Fukuoka, Hiroshi Morita, Masayuki Daito, Tatsuya Kamei, Hiroyuki Hamasaki, Yasuhisa Shimazaki
2019	—	`conf`	A 28nm fully digital voltage monitor with 16.5uV/°C accuracy and 0.8mV quantized error from -40 to 160°C for ISO26262 ASIL-D capable MCU. A-SSCC Toshifumi Uemura, Yuko Kitaji, Kazuki Fukuoka
2017	J	`jnl`	A 16 nm FinFET Heterogeneous Nona-Core SoC Supporting ISO26262 ASIL B Standard. IEEE J. Solid State Circuits Shinichi Shibahara, Chikafumi Takahashi, Kazuki Fukuoka, Yuko Kitaji, Takahiro Irita, Hirotaka Hara, Yasuhisa Shimazaki, Jun Matsushima
2016	—	`conf`	4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability. ISSCC Chikafumi Takahashi, Shinichi Shibahara, Kazuki Fukuoka, Jun Matsushima, Yuko Kitaji, Yasuhisa Shimazaki, Hirotaka Hara, Takahiro Irita
2016	J	`jnl`	Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM. IEEE J. Emerg. Sel. Topics Circuits Syst. Takao Nomura, Ryo Mori, Koji Takayanagi, Kazuki Fukuoka, Koji Nii
2015	J	`jnl`	A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor With 2 GHz Cores and Low-Power 1 GHz Cores. IEEE J. Solid State Circuits Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Hiroshi Kishibe, Midori Nagayama, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori
2014	—	`conf`	10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores. ISSCC Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Noriaki Maeda, Hiroshi Kishibe, Midori Nagayama, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori
2013	—	`conf`	A 28nm High-κ metal-gate single-chip communications processor with 1.5GHz dual-core application processor and LTE/HSPA+-capable baseband processor. ISSCC Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi, Kazuki Fukuoka, Noriaki Maeda, Koji Nii, Takeshi Kataoka, Toshihiro Hattori
2013	J	`jnl`	Power-Management Features of R-Mobile U2, an Integrated Application Processor and Baseband Processor. IEEE Micro Kazuki Fukuoka, Noriaki Maeda, Koji Nii, Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi, Takeshi Kataoka, Toshihiro Hattori
2013	—	`conf`	Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor. CICC Takao Nomura, Ryo Mori, Munehiro Ito, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Kazuo Otsuga, Koji Nii, Sadayuki Morita, Tomoaki Hashimoto, Tsuyoshi Kida, Junichi Yamada, Hideki Tanaka
2012	—	`conf`	A 123μW standby power technique with EM-tolerant 1.8V I/O NMOS power switch in 28nm HKMG technology. CICC Kazuki Fukuoka, Ryo Mori, A. Kato, Motoshige Igarashi, Koji Shibutani, T. Yamaki, Shinji Tanaka, Koji Nii, Sadayuki Morita, Takao Koike, Noriaki Sakamoto
2004	—	`conf`	A Novel Layout Approach Using Dual Supply Voltage Technique on Body-Tied PD-SOI. PATMOS Kazuki Fukuoka, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Akira Tada
2004	—	`conf`	A technique for high-speed circuits on SOI using look-ahead type active body bias control. ISCAS (2) Masaaki Iijima, Katsuya Fujita, Kazuki Fukuoka, Masahiro Numa, Keisuke Yamamoto, Kengo Takata
2004	—	`conf`	Leakage power reduction for clock gating scheme on PD-SOI. ISCAS (2) Kazuki Fukuoka, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Akira Tada