Kazuaki J. Murakami

104 papers A* 2A 16B 2C 8Misc 3Journal 35Unranked 38

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	On Clustering Algorithms: Applications in Word-Embedding Documents. J. Comput. Israel Mendonça, Antoine Trouvé, Akira Fukuda, Kazuaki J. Murakami
2018	—	`conf`	Exploring a Topical Representation of Documents for Recommendation Systems. iCAST Israel Mendonça, Antoine Trouvé, Akira Fukuda, Kazuaki J. Murakami
2018	J	`jnl`	Semantic image retrieval for complex queries using a knowledge parser. Multim. Tools Appl. Hua Chen, Antoine Trouvé, Kazuaki J. Murakami, Akira Fukuda
2017	J	`jnl`	An intelligent annotation-based image retrieval system based on RDF descriptions. Comput. Electr. Eng. Hua Chen, Antoine Trouvé, Kazuaki J. Murakami, Akira Fukuda
2016	J	`jnl`	Guide Automatic Vectorization by means of Machine Learning: A Case Study of Tensor Contraction Kernels. IEICE Trans. Inf. Syst. Antoine Trouvé, Arnaldo J. Cruz, Kazuaki J. Murakami, Masaki Arai, Tadashi Nakahira, Eiji Yamanaka
2015	J	`jnl`	A survey on big data processing infrastructure: evolving role of FPGA. Int. J. Big Data Intell. Krishna Chaitanya Nunna, Farhad Mehdipour, Antoine Trouvé, Kazuaki J. Murakami
2015	—	`conf`	Analyzing Brain Waves for Activity Recognition of Learners. ICT-EurAsia/CONFENIS Hiromichi Abe, Kazuya Kinoshita, Kensuke Baba, Shigeru Takano, Kazuaki J. Murakami
2015	C	`conf`	Interactive Visualization of Quantitative Data with G2D3. VINCI Antoine Trouvé, Kazuaki J. Murakami
2015	—	`conf`	MAD7F: A FPGA-based CMP Memory Architecture Simulation Framework. CANDAR Hadrien A. Clarke, Kazuaki J. Murakami
2015	J	`jnl`	Towards Activity Recognition of Learners in On-line Lecture. J. Mobile Multimedia Hiromichi Abe, Takuya Kamizono, Kazuya Kinoshita, Kensuke Baba, Shigeru Takano, Kazuaki J. Murakami
2014	—	`conf`	A Design Methodology for Performance Maintenance of 3D Network-on-Chip with Multiplexed Through-Silicon Vias. MES@ISCA Mostafa Said, Farhad Mehdipour, Kazuaki J. Murakami, Mohamed El-Sayed
2014	J	`jnl`	A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits. IEICE Trans. Electron. Hiroshi Kataoka, Hiroaki Honda, Farhad Mehdipour, Nobuyuki Yoshikawa, Akira Fujimaki, Hiroyuki Akaike, Naofumi Takagi, Kazuaki J. Murakami
2014	—	`conf`	Accelerated design space pruning for CMP memory architectures: work-in-progress. SpringSim (HPS) Hadrien A. Clarke, Antoine Trouvé, Kazuaki J. Murakami
2014	—	`conf`	An Evaluation of a Complex Event Processing Engine. IIAI-AAI Satoshi Kuboi, Kensuke Baba, Shigeru Takano, Kazuaki J. Murakami
2014	J	`jnl`	Predicting Vectorization Profitability Using Binary Classification. IEICE Trans. Inf. Syst. Antoine Trouvé, Arnaldo J. Cruz, Dhouha Ben Brahim, Hiroki Fukuyama, Kazuaki J. Murakami, Hadrien A. Clarke, Masaki Arai, Tadashi Nakahira, Eiji Yamanaka
2014	—	`conf`	Towards Activity Recognition of Learners by Kinect. IIAI-AAI Takuya Kamizono, Hiromichi Abe, Kensuke Baba, Shigeru Takano, Kazuaki J. Murakami
2014	—	`conf`	Towards activity recognition of learners by simple electroencephalographs. ISDOC Hiromichi Abe, Kensuke Baba, Shigeru Takano, Kazuaki J. Murakami
2013	—	`conf`	A Smart Cyber-physical Systems-Based Solution for Pest Control (Work in Progress). GreenCom/iThings/CPScom Farhad Mehdipour, Krishna Chaitanya Nunna, Kazuaki J. Murakami
2013	—	`conf`	Early stage power management for 3D FPGAs considering hierarchical routing resources. ACM Great Lakes Symposium on VLSI Krishna Chaitanya Nunna, Farhad Mehdipour, Kazuaki J. Murakami
2013	A	`conf`	MAD7: a memory architecture simulator targeted at design space exploration. ICS Hadrien A. Clarke, Antoine Trouvé, Kazuaki J. Murakami
2013	Misc	`conf`	Using Machine Learning in Order to Improve Automatic SIMD Instruction Generation. ICCS Antoine Trouvé, Arnaldo J. Cruz, Hiroki Fukuyama, Jun Maki, Hadrien A. Clarke, Kazuaki J. Murakami, Masaki Arai, Tadashi Nakahira, Eiji Yamanaka
2012	—	`conf`	A Comparison of DAG and Mesh Topologies for Coarse-Grain Reconfigurable Array. IPDPS Workshops Jonathan Antusiak, Antoine Trouvé, Kazuaki J. Murakami
2012	C	`conf`	A Three-Dimensional Integrated Accelerator. DSD Farhad Mehdipour, Krishna Chaitanya Nunna, Koji Inoue, Kazuaki J. Murakami
2012	J	`jnl`	Improving performance and energy efficiency of embedded processors via post-fabrication instruction set customization. J. Supercomput. Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki J. Murakami
2012	C	`conf`	Methodology for early estimation of hierarchical routing resources in 3D FPGAs. VLSI-SoC Krishna Chaitanya Nunna, Farhad Mehdipour, Masayoshi Yoshimura, Kazuaki J. Murakami
2012	J	`jnl`	Optimisations Techniques for the Automatic ISA Customisation Algorithm. IEICE Trans. Inf. Syst. Antoine Trouvé, Kazuaki J. Murakami
2012	J	`jnl`	PASTIS: a photonic arbitration with scalable token injection scheme. SIGARCH Comput. Archit. News Julien Tribino, Antoine Trouvé, Hadrien A. Clarke, Kazuaki J. Murakami
2012	—	`conf`	Power and Performance Analysis of GPU-Accelerated Systems. HotPower Yuki Abe, Hiroshi Sasaki, Martin Peres, Koji Inoue, Kazuaki J. Murakami, Shinpei Kato
2012	B	`conf`	Thermal-aware partitioning for 3D FPGAs. FPL Krishna Chaitanya Nunna, Farhad Mehdipour, Kazuaki J. Murakami
2011	J	`jnl`	A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits. J. Syst. Archit. Farhad Mehdipour, Hiroaki Honda, Koji Inoue, Hiroshi Kataoka, Kazuaki J. Murakami
2011	—	`conf`	A thermal-aware mapping algorithm for reducing peak temperature of an accelerator deployed in a 3D stack. 3DIC Farhad Mehdipour, Krishna Chaitanya Nunna, Lovic Gauthier, Koji Inoue, Kazuaki J. Murakami
2011	J	`jnl`	Augmenting DR-ASIP flexibility through multi-mode custom instructions. SIGARCH Comput. Archit. News Antoine Trouvé, Kazuaki J. Murakami
2011	—	`conf`	Evaluation and optimization of Java object ordering schemes. ICEEI Amil A. Ilham, Kazuaki J. Murakami
2011	J	`jnl`	NSIM: An Interconnection Network Simulator for Extreme-Scale Parallel Computers. IEICE Trans. Inf. Syst. Hideki Miwa, Ryutaro Susukita, Hidetomo Shibamura, Tomoya Hirao, Jun Maki, Makoto Yoshida, Takayuki Kando, Yuichiro Ajima, Ikuo Miyoshi, Toshiyuki Shimizu, Yuji Oinaga, Hisashige Ando, Yuichi Inadomi, Koji Inoue, Mutsumi Aoyagi, Kazuaki J. Murakami
2011	—	`conf`	Performance evaluation of 3D stacked multi-core processors with temperature consideration. 3DIC Takaaki Hanada, Hiroshi Sasaki, Koji Inoue, Kazuaki J. Murakami
2011	—	`conf`	Routing architecture and algorithms for a superconductivity circuits-based computing hardware. CCECE Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Kazuaki J. Murakami
2011	C	`conf`	Thermal Effect of TSVs in 3D Die-Stacked Integrated Circuits. DSD Hadrien A. Clarke, Kazuaki J. Murakami
2010	A	`conf`	Mapping scientific applications on a large-scale data-path accelerator implemented by single-flux quantum (SFQ) circuits. DATE Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Irina Kataeva, Kazuaki J. Murakami, Hiroyuki Akaike, Akira Fujimaki
2009	—	`conf`	A Dynamic Solution for Efficient MPI Collective Communications. CSO (1) Hyacinthe Nzigou Mamadou, Feng Long Gu, Vivien Oddou, Takeshi Nanri, Kazuaki J. Murakami
2009	—	`conf`	A combined analytical and simulation-based model for performance evaluation of a reconfigurable instruction set processor. ASP-DAC Farhad Mehdipour, Hamid Noori, Bahman Javadi, Hiroaki Honda, Koji Inoue, Kazuaki J. Murakami
2009	—	`conf`	Accelerating Cryptographic Applications Using Dynamically Reconfigurable Functional Units. ReConFig Antoine Trouvé, Lovic Gauthier, Takayuki Kando, Benoit Ryder, Sebastien Pouzols, Pradeep Rao, Norifumi Yoshimatsu, Kazuaki J. Murakami
2009	—	`conf`	Empirical Performance Models for Java Workloads. ARCS Pradeep Rao, Kazuaki J. Murakami
2009	J	`jnl`	Identifying Processor Bottlenecks in Virtual Machine Based Execution of Java Bytecode. IEICE Trans. Electron. Pradeep Rao, Kazuaki J. Murakami
2009	—	`conf`	Performance balancing: software-based on-chip memory management for effective CMP executions. MEDEA@PACT Naoto Fukumoto, Kenichi Imazato, Koji Inoue, Kazuaki J. Murakami
2009	J	`jnl`	Rapid Design Space Exploration of a Reconfigurable Instruction-Set Processor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Farhad Mehdipour, Hamid Noori, Koji Inoue, Kazuaki J. Murakami
2009	J	`jnl`	Reducing On-Chip DRAM Energy via Data Transfer Size Optimization. IEICE Trans. Electron. Takatsugu Ono, Koji Inoue, Kazuaki J. Murakami, Kenji Yoshida
2008	J	`jnl`	A Reconfigurable Functional Unit with Conditional Execution for Multi-Exit Custom Instructions. IEICE Trans. Electron. Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki J. Murakami
2008	J	`jnl`	A gravity-directed temporal partitioning approach. IEICE Electron. Express Farhad Mehdipour, Hamid Noori, Hiroaki Honda, Koji Inoue, Kazuaki J. Murakami
2008	J	`jnl`	An architecture framework for an adaptive extensible processor. J. Supercomput. Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Morteza Saheb Zamani
2008	A	`conf`	Analyzing the impact of data prefetching on Chip MultiProcessors. ACSAC Naoto Fukumoto, Tomonobu Mihara, Koji Inoue, Kazuaki J. Murakami
2008	J	`jnl`	Character Projection Mask Set Optimization for Enhancing Throughput of MCC Projection Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Makoto Sugihara, Yusuke Matsunaga, Kazuaki J. Murakami
2008	—	`conf`	Design space exploration for a coarse grain accelerator. ASP-DAC Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Koji Inoue, Kazuaki J. Murakami
2008	A	`conf`	Enhancing energy efficiency of processor-based embedded systems through post-fabrication ISA extension. ISLPED Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki J. Murakami
2008	—	`conf`	Improving Energy Efficiency of Configurable Caches via Temperature-Aware Configuration Selection. ISVLSI Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki J. Murakami
2008	J	`jnl`	Performance Models for MPI Collective Communications with Network Contention. IEICE Trans. Commun. Hyacinthe Nzigou Mamadou, Takeshi Nanri, Kazuaki J. Murakami
2008	A	`conf`	Performance prediction of large-scale parallell system and application using macro-level simulation. SC Ryutaro Susukita, Hisashige Ando, Mutsumi Aoyagi, Hiroaki Honda, Yuichi Inadomi, Koji Inoue, Shigeru Ishizuki, Yasunori Kimura, Hidemi Komatsu, Motoyoshi Kurokawa, Kazuaki J. Murakami, Hidetomo Shibamura, Shuji Yamamura, Yunqing Yu
2008	J	`jnl`	Proposal of a Desk-Side Supercomputer with Reconfigurable Data-Paths Using Rapid Single-Flux-Quantum Circuits. IEICE Trans. Electron. Naofumi Takagi, Kazuaki J. Murakami, Akira Fujimaki, Nobuyuki Yoshikawa, Koji Inoue, Hiroaki Honda
2008	J	`jnl`	Reliable Cache Architectures and Task Scheduling for Multiprocessor Systems. IEICE Trans. Electron. Makoto Sugihara, Tohru Ishihara, Kazuaki J. Murakami
2008	J	`jnl`	Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems. IEICE Trans. Electron. Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki J. Murakami
2007	J	`jnl`	A Next-Generation Enterprise Server System with Advanced Cache Coherence Chips. IEICE Trans. Electron. Mariko Sakamoto, Akira Katsuno, Go Sugizaki, Toshio Yoshida, Aiichiro Inoue, Koji Inoue, Kazuaki J. Murakami
2007	J	`jnl`	Architectural-Level Soft-Error Modeling for Estimating Reliability of Computer Systems. IEICE Trans. Electron. Makoto Sugihara, Tohru Ishihara, Kazuaki J. Murakami
2007	—	`conf`	Dynamic Optimization of Load Balance in MPI Broadcast. PVM/MPI Takesi Soga, Kouji Kurihara, Takeshi Nanri, Motoyoshi Kurokawa, Kazuaki J. Murakami
2007	—	`conf`	Handling Control Data Flow Graphs for a Tightly Coupled Reconfigurable Accelerator. ICESS Hamid Noori, Farhad Mehdipour, Morteza Saheb Zamani, Koji Inoue, Kazuaki J. Murakami
2007	J	`jnl`	Improving Performance and Energy Saving in a Reconfigurable Processor via Accelerating Control Data Flow Graphs. IEICE Trans. Inf. Syst. Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Koji Inoue, Kazuaki J. Murakami
2007	A	`conf`	Interactive presentation: Generating and executing multi-exit custom instructions for an adaptive extensible processor. DATE Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Maziar Goudarzi
2007	C	`conf`	Performance Analysis and Linear Optimization Modeling of All-to-all Collective Communication Algorithms. SBAC-PAD Hyacinthe Nzigou Mamadou, Takeshi Nanri, Kazuaki J. Murakami, Guilherme de Melo Baptista Domingues
2007	A	`conf`	Task scheduling for reliable cache architectures of multiprocessor systems. DATE Makoto Sugihara, Tohru Ishihara, Kazuaki J. Murakami
2007	J	`jnl`	Technology Mapping Technique for Increasing Throughput of Character Projection Lithography. IEICE Trans. Electron. Makoto Sugihara, Kenta Nakamura, Yusuke Matsunaga, Kazuaki J. Murakami
2007	A	`conf`	The Effect of Nanometer-Scale Technologies on the Cache Size Selection for Low Energy Embedded Systems. ESA Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki J. Murakami
2007	—	`conf`	The effect of temperature on cache size tuning for low energy embedded systems. ACM Great Lakes Symposium on VLSI Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki J. Murakami
2006	B	`conf`	A Reconfigurable Functional Unit for an Adaptive Dynamic Extensible Processor. FPL Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Morteza Saheb Zamani
2006	C	`conf`	A character size optimization technique for throughput enhancement of character projection lithography. ISCAS Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura
2006	—	`conf`	An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional Unit. Asia-Pacific Computer Systems Architecture Conference Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Kazuaki J. Murakami, Mehdi Sedighi, Koji Inoue
2006	J	`jnl`	Cell Library Development Methodology for Throughput Enhancement of Character Projection Equipment. IEICE Trans. Electron. Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura
2006	—	`conf`	Circuit Area-latency Optimization Technique for High-precision Elementary Functions. APCCAS Koji Hashimoto, Vasily G. Moshnyaga, Kazuaki J. Murakami
2006	Misc	`conf`	Collective Communication Costs Analysis over Gigabit Ethernet and InfiniBand. HiPC Hyacinthe Nzigou Mamadou, Takeshi Nanri, Kazuaki J. Murakami
2006	C	`conf`	Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit. EUC Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Kazuaki J. Murakami, Koji Inoue, Mehdi Sedighi
2006	—	`conf`	GifT: A Gravity-Directed and Life-Time Based Algorithm for Temporal Partitioning of Data Flow Graphs. ERSA Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi, Kazuaki J. Murakami, Hamid Noori
2006	Misc	`conf`	Preliminary performance evaluation of an adaptive dynamic extensible processor for embedded applications. SAC Hamid Noori, Kazuaki J. Murakami
2006	—	`conf`	REDEFIS: a system with a redefinable instruction set processor. SBCCI Victor M. Goulart Ferreira, Lovic Gauthier, Takayuki Kando, Takuma Matsuo, Toshihiko Hashinaga, Kazuaki J. Murakami
2006	A	`conf`	Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework. IPDPS Farhad Mehdipour, Morteza Saheb Zamani, Hamid Reza Ahmadifar, Mehdi Sedighi, Kazuaki J. Murakami
2005	—	`conf`	Cell Library Development Methodology for Throughput Enhancement of Electron Beam Direct-Write Lithography Systems. SoC Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura
2005	J	`jnl`	Quantitative Evaluation of State-Preserving Leakage Reduction Algorithm for L1 Data Caches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Reiko Komiya, Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2004	—	`conf`	A low-power I-cache design with tag-comparison reuse. SoC Koji Inoue, Hidekazu Tanaka, Vasily G. Moshnyaga, Kazuaki J. Murakami
2004	—	`conf`	Practical Test Architecture Optimization for System-on-a-Chip under Floorplanning Constraints. ISVLSI Makoto Sugihara, Kazuaki J. Murakami, Yusuke Matsunaga
2003	J	`jnl`	Instruction Encoding for Reducing Power Consumption of I-ROMs Based on Execution Locality. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2002	C	`conf`	A Low Energy Set-Associative I-Cache with Extended BTB. ICCD Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2002	A	`conf`	A history-based I-cache for low-energy multimedia applications. ISLPED Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2002	—	`conf`	Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints. PACS Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2002	—	`conf`	Reducing power consumption of instruction ROMs by exploiting instruction frequency. APCCAS (2) Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2001	—	`conf`	Development of PPRAM-link interface (PLIF) IP core for high-speed inter-SoC communication. ASP-DAC Takanori Okuma, Koji Hashimoto, Kazuaki J. Murakami
2000	—	`conf`	Performance/Energy Efficiency of Variable Line-Size Caches for Intelligent Memory Systems. Intelligent Memory Systems Koji Inoue, Koji Kai, Kazuaki J. Murakami
1999	A*	`conf`	Dynamically Variable Line-Size Cache Exploiting High On-Chip Memory Bandwidth of Merged DRAM/Logic LSIs. HPCA Koji Inoue, Koji Kai, Kazuaki J. Murakami
1999	A	`conf`	MOE: A Special-Purpose Parallel Computer for High-Speed, Large-Scale Molecular Orbital Calculation. SC Koji Hashimoto, Hiroto Tomita, Koji Inoue, Katsuhiko Metsugi, Kazuaki J. Murakami, Shinjiro Inabata, So Yamada, Nobuaki Miyakawa, Hajime Takashima, Kunihiro Kitamura, Shigeru Obara, Takashi Amisaki, Kazutoshi Tanabe, Umpei Nagashima
1999	A	`conf`	Way-predicting set-associative cache for high performance and low energy consumption. ISLPED Koji Inoue, Tohru Ishihara, Kazuaki J. Murakami
1998	A	`conf`	Optimizing the DRAM refresh count for merged DRAM/logic LSIs. ISLPED Taku Ohsawa, Koji Kai, Kazuaki J. Murakami
1993	A	`conf`	A Micro-Vectorprocessor Architecture: Performance Modeling and Benchmarking. International Conference on Supercomputing Takashi Hashimoto, Kazuaki J. Murakami, Tetsuo Hironaka, Hiroto Yasuura
1992	A	`conf`	Benchmarking a vector-processor prototype based on multithreaded streaming/FIFO vector (MSFV) architecture. ICS Tetsuo Hironaka, Takashi Hashimoto, Keizo Okazaki, Kazuaki J. Murakami, Shinji Tomita
1991	J	`jnl`	DSNS (dynamically-hazard-resolved statically-code-scheduled, nonuniform superscalar): yet another superscalar processor architecture. SIGARCH Comput. Archit. News Morihiro Kuga, Kazuaki J. Murakami, Shinji Tomita
1991	J	`jnl`	Toward advanced parallel processing: exploiting parallelism at task and instruction levels. IEEE Micro Akira Fukuda, Kazuaki J. Murakami, Shinji Tomita
1989	A*	`conf`	SIMP (Single Instruction stream/Multiple Instruction Pipelining): A Novel High-Speed Single-Processor Architecture. ISCA Kazuaki J. Murakami, Naohiko Irie, Morihiro Kuga, Shinji Tomita
1989	—	`conf`	The Kyushu University Reconfigurable Parallel Processor - Design Philosophy and Architecture. IFIP Congress Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita
1989	A	`conf`	The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures. ICS Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita
1988	J	`jnl`	An overview of the Kyushu University reconfigurable parallel processor. SIGARCH Comput. Archit. News Kazuaki J. Murakami, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita