Kaviraj Chopra

23 papers A* 4A 9Misc 1Journal 8

Year	Rank	Type	Title / Venue / Authors
2011	J	`jnl`	Fast Statistical Static Timing Analysis Using Smart Monte Carlo Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vineeth Veetil, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2011	J	`jnl`	Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Cheng Zhuo, Kaviraj Chopra, Dennis Sylvester, David T. Blaauw
2010	J	`jnl`	Victim Alignment in Crosstalk-Aware Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2008	J	`jnl`	A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ashish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David T. Blaauw
2008	A	`conf`	A statistical approach for full-chip gate-oxide reliability analysis. ICCAD Kaviraj Chopra, Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2008	—	`—`	Statistical Performance Analysis Optimization of Digital Circuits. Kaviraj Chopra
2008	J	`jnl`	Statistical Timing Analysis: From Basic Principles to State of the Art. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David T. Blaauw, Kaviraj Chopra, Ashish Srivastava, Louis Scheffer
2008	A	`conf`	Transistor-Specific Delay Modeling for SSTA. DATE Brian Cline, Kaviraj Chopra, David T. Blaauw, Andres Torres, Savithri Sundareswaran
2007	J	`jnl`	Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2007	J	`jnl`	Statistical Timing Based Optimization using Gate Sizing CoRR Aseem Agarwal, Kaviraj Chopra, David T. Blaauw
2007	A*	`conf`	Top-k Aggressors Sets in Delay Noise Analysis. DAC Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer
2007	A	`conf`	Victim alignment in crosstalk aware timing analysis. ICCAD Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada
2006	A	`conf`	A new statistical max operation for propagating skewness in statistical timing analysis. ICCAD Kaviraj Chopra, Bo Zhai, David T. Blaauw, Dennis Sylvester
2006	A	`conf`	An efficient static algorithm for computing the soft error rates of combinational circuits. DATE Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2006	A	`conf`	Analysis and modeling of CD variation for statistical static timing. ICCAD Brian Cline, Kaviraj Chopra, David T. Blaauw, Yu Cao
2006	J	`jnl`	Efficient Symbolic Algorithms for Computing the Minimum and Bounded Leakage States. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kaviraj Chopra, Sarma B. K. Vrudhula
2005	A*	`conf`	CAD tools for variation tolerance. DAC David T. Blaauw, Kaviraj Chopra
2005	A*	`conf`	Circuit optimization using statistical static timing analysis. DAC Aseem Agarwal, Kaviraj Chopra, David T. Blaauw, Vladimir Zolotov
2005	A	`conf`	Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation. ICCAD Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David T. Blaauw, Dennis Sylvester
2005	A	`conf`	Statistical Timing Based Optimization using Gate Sizing. DATE Aseem Agarwal, Kaviraj Chopra, David T. Blaauw
2004	A	`conf`	A Framework for Battery-Aware Sensor Management. DATE Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chopra, R. Srinivasan
2004	Misc	`conf`	Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic. VLSI Design Kaviraj Chopra, Sarma B. K. Vrudhula, Sarvesh Bhardwaj
2004	A*	`conf`	Implicit pseudo boolean enumeration algorithms for input vector control. DAC Kaviraj Chopra, Sarma B. K. Vrudhula