Kaveh Aasaraai

19 papers A* 1A 2B 2Misc 1Journal 5Unranked 8
YearRankTypeTitle / Venue / Authors
2023 A conf
Cyclone-NTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms.
FPGA
Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers
2022 J jnl
CycloneNTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms.
IACR Cryptol. ePrint Arch.
Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers
2022 J jnl
FPGA Acceleration of Multi-Scalar Multiplication: CycloneMSM.
IACR Cryptol. ePrint Arch.
Kaveh Aasaraai, Don Beaver, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela
2018 — conf
RAW 2018 Invited Talks.
IPDPS Workshops
Jürgen Becker, Viktor K. Prasanna, Markus Weimer, Wayne Luk, Kaveh Aasaraai, Derek Chiou
2014 Misc conf
An Architectural Approach to Characterizing and Eliminating Sources of Inefficiency in a Soft Processor Design.
FCCM
Kaveh Aasaraai, Andreas Moshovos
2014 — conf
What limits the operating frequency of a soft processor design.
ReConFig
Kaveh Aasaraai, Andreas Moshovos
2013 B conf
Low-cost, high-performance branch predictors for soft processors.
FPL
Di Wu, Kaveh Aasaraai, Andreas Moshovos
2012 J jnl
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution.
Int. J. Reconfigurable Comput.
Kaveh Aasaraai, Andreas Moshovos
2012 — conf
SPREX: A soft processor with Runahead execution.
ReConFig
Kaveh Aasaraai, Andreas Moshovos
2012 A conf
Toward virtualizing branch direction prediction.
DATE
Maryam Sadooghi-Alvandi, Kaveh Aasaraai, Andreas Moshovos
2010 — conf
An Efficient Non-blocking Data Cache for Soft Processors.
ReConFig
Kaveh Aasaraai, Andreas Moshovos
2010 A* conf
Caliper: a tool to generate precise and closed-loop traffic.
SIGCOMM
Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan
2010 — conf
Design space exploration of instruction schedulers for out-of-order soft processors.
FPT
Kaveh Aasaraai, Andreas Moshovos
2009 B conf
Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming.
FPL
Kaveh Aasaraai, Andreas Moshovos
2007 — conf
A Power-Aware Alternative for the Perceptron Branch Predictor.
Asia-Pacific Computer Systems Architecture Conference
Kaveh Aasaraai, Amirali Baniasadi
2007 — conf
Computational and storage power optimizations for the O-GEHL branch predictor.
Conf. Computing Frontiers
Kaveh Aasaraai, Amirali Baniasadi, Ehsan Atoofian
2007 J jnl
Exploiting Speculation Cost Prediction in Power-Aware Applications.
J. Low Power Electron.
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai
2007 — conf
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols.
Conf. Computing Frontiers
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai
2006 J jnl
Low-Power Perceptron Branch Predictor.
J. Low Power Electron.
Kaveh Aasaraai, Amirali Baniasadi