Katsuyuki Sakuma

13 papers Journal 5Unranked 8
YearRankTypeTitle / Venue / Authors
2020 J jnl
Back to Finger-Writing: Fingertip Writing Technology Based on Pressure Sensing.
IEEE Access
Gaddi Blumrosen, Katsuyuki Sakuma, John Jeremy Rice, John U. Knickerbocker
2019 — conf
Turning the Finger into a Writing Tool.
EMBC
Katsuyuki Sakuma, Gaddi Blumrosen, John Jeremy Rice, Jeff Rogers, John U. Knickerbocker
2013 — conf
Thermal design guideline and new cooling solution for a three-dimensional (3D) chip stack.
3DIC
Keiji Matsumoto, Soichiro Ibaraki, Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi, Hiroyuki Mori, Yasumitsu Orii, Fumiaki Yamada, Kohei Fujihara, Junichi Takamatsu, Koji Kondo
2011 — conf
Chip-level TSV integration for rapid prototyping of 3D system LSIs.
3DIC
Kazuyuki Hozawa, Futoshi Furuta, Yuko Hanaoka, Mayu Aoki, Kenichi Takeda, Katsuyuki Sakuma, Kang Wook Lee, Takafumi Fukushima, Mitsumasa Koyanagi
2011 — conf
Low temperature Au-Au bonding with VUV/O3 treatment.
3DIC
Akiko Okada, Masatsugu Nimura, Naoko Unami, Akitsu Shigetou, Hirokazu Noma, Katsuyuki Sakuma, Jun Mizuno, Shuichi Shoji
2011 — conf
Thermal stress analysis of die stacks with fine-pitch IMC interconnections for 3D integration.
3DIC
Sayuri Kohara, Akihiro Horibe, Kuniaki Sueoka, Keiji Matsumoto, Fumiaki Yamada, Yasumitsu Orii, Katsuyuki Sakuma, Takahiro Kinoshita, Takashi Kawakami
2010 — conf
High density 3D integration by pre-applied Inter Chip Fill.
3DIC
Akihiro Horibe, Kuniaki Sueoka, Katsuyuki Sakuma, Sayuri Kohara, Keiji Matsumoto, Hidekazu Kikuchi, Yasumitsu Orii, Toshiro Mitsuhashi, Fumiaki Yamada
2009 — conf
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack.
3DIC
Yuki Ohara, Akihiro Noriki, Katsuyuki Sakuma, Kang Wook Lee, Mariappan Murugesan, Jichoel Bea, Fumiaki Yamada, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
2009 — conf
Thermal resistance measurements of interconnections for a three-dimensional (3D) chip stack.
3DIC
Keiji Matsumoto, Soichiro Ibaraki, Katsuyuki Sakuma, Fumiaki Yamada
2008 J jnl
3D chip stacking with C4 technology.
IBM J. Res. Dev.
Bing Dang, Steven L. Wright, Paul S. Andry, Edmund J. Sprogis, Cornelia K. Tsang, M. John Interrante, Bucknell C. Webb, Robert J. Polastre, Raymond R. Horton, Chirag S. Patel, Arun Sharma, J. Zheng, Katsuyuki Sakuma, John U. Knickerbocker
2008 J jnl
3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections.
IBM J. Res. Dev.
Katsuyuki Sakuma, Paul S. Andry, Cornelia K. Tsang, Steven L. Wright, Bing Dang, Chirag S. Patel, Bucknell C. Webb, J. Maria, Edmund J. Sprogis, S. K. Kang, Robert J. Polastre, Raymond R. Horton, John U. Knickerbocker
2008 J jnl
Three-dimensional silicon integration.
IBM J. Res. Dev.
John U. Knickerbocker, Paul S. Andry, Bing Dang, Raymond R. Horton, Mario J. Interrante, Chirag S. Patel, Robert J. Polastre, Katsuyuki Sakuma, Ranjani Sirdeshmukh, Edmund J. Sprogis, Sri M. Sri-Jayantha, Antonio M. Stephens, Anna W. Topol, Cornelia K. Tsang, Bucknell C. Webb, Steven L. Wright
1998 J jnl
Future system-on-silicon LSI chips.
IEEE Micro
Mitsumasa Koyanagi, Hiroyuki Kurino, Kang Wook Lee, Katsuyuki Sakuma, Nobuaki Miyakawa, Hikotaro Itani