Katsuhiko Sato

22 papers A* 1A 2B 2C 1Misc 1Journal 12Unranked 3

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	Verification of Internal Memory Readout by Voltage Fault Attack on Automotive ECUs. ICCE Ryusei Eda, Kota Hisafuru, Katsuhiko Sato, Yuya Adachi, Nozomu Togawa
2007	Misc	`conf`	Peer-to-Peer Based Mobile Video On-Demand with Layered Video Distribution. CISIS Katsuhiko Sato, Koichi Yagishita, Michiaki Katsumoto, Tetsuya Miki
2006	J	`jnl`	Network for Video Distribution between Preceding and Succeeding Vehicles on the Same Route. Inf. Media Technol. Katsuhiko Sato, Michiaki Katsumoto, Tetsuya Miki
2006	—	`conf`	Responses of Fluctuating Biological Systems. BioADIT Tetsuya Yomo, Katsuhiko Sato, Yoichiro Ito, Kunihiko Kaneko
2005	J	`jnl`	A New VOD Technique to Support Client Mobility. J. Mobile Multimedia Katsuhiko Sato, Michiaki Katsumoto, Tetsuya Miki
2005	B	`conf`	Fragmented Patching: New VOD Technique That Supports Client Mobility. AINA Katsuhiko Sato, Michiaki Katsumoto, Tetsuya Miki
2004	—	`conf`	A New Multicast Technique Supporting Source Mobility for Future Vision Delivery Service. AINA (1) Katsuhiko Sato, Michiaki Katsumoto, Tetsuya Miki
2003	B	`conf`	Asynchronous Media Casting Network: An Optimal Network Scheme for On-Demand Video Distribution. AINA Katsuhiko Sato, Michiaki Katsumoto, Tetsuya Miki
2002	—	`conf`	A Proposal of Multicast for Personalized Media Stream Delivery. ICOIN (1) Katsuhiko Sato, Michiaki Katsumoto
2001	J	`jnl`	A 150-MHz graphics rendering processor with 256-Mb embedded DRAM. IEEE J. Solid State Circuits Aurangzeb K. Khan, Hidetaka Magoshi, Tadashi Matsumoto, Jun-Ichi Fujita, Makoto Furuhashi, Masatoshi Imai, Yoshikazu Kurose, Morio Sato, Katsuhiko Sato, Yujiro Yamashita, Kinying Kwan, Duc-Ngoc Le, John H. Yu, Trung Nguyen, Steven Yang, Allen Tsou, King Chow, John Shen, Min Li, Jun Li, Hong Zhao, Kenji Yoshida
1999	J	`jnl`	Universal Test Interface for Embedded-DRAM Testing. IEEE Des. Test Comput. Shinji Miyano, Katsuhiko Sato, Kenji Numata
1998	J	`jnl`	A configurable DRAM macro design for 2112 derivative organizations to be synthesized using a memory generator. IEEE J. Solid State Circuits Tomoaki Yabe, Shinji Miyano, Katsuhiko Sato, Masaharu Wada, Ryo Haga, Osamu Wada, Motohiro Enkaku, Takehiko Hojyo, Kenichiro Mimoto, Masaaki Tazawa, Tsutomu Ohkubo, Kenji Numata
1997	J	`jnl`	SRAM cell stability under the influence of parasitic resistances and data holding voltage as a stability prober. IEEE J. Solid State Circuits Hideo Kato, Masataka Matsui, Katsuhiko Sato, H. Shibata, K. Hashimoto, Takayuki Ootani, Kiyofumi Ochii
1996	A	`conf`	Autonomous mobile patrol system for nuclear power plants: field test report of vehicle navigation and sensor positioning. IROS Katsuhiko Sato, Hisashi Hozumi, Satoshi Okada, Takao Itoh, Shigeru Kanemoto, Hideharu Okano
1995	J	`jnl`	A 1.6 Gbyte/s data transfer rate 8 Mb embedded DRAM. IEEE J. Solid State Circuits Shinji Miyano, Kenji Numata, Katsuhiko Sato, Tomoaki Yabe, Masaharu Wada, Ryo Haga, Motohiro Enkaku, Masazumi Shiochi, Yutaka Kawashima, Masayuki Iwase, Masahisa Ohgata, Junpei Kumagai, Takeshi Yoshida, Masaomi Sakurai, Seiji Kaki, Narutoshi Yanagiya, Hiroshi Shinya, Tohm Fumyama, Paul Hansen, Marc Hannah, Michael Nagy, Anan Nagarajan, Mana Rungsea
1995	A*	`conf`	Hierarchical Autonomous Mobile Control System of a Patrol Robot for Nuclear Power Plants. ICRA Etsurou Igarashi, Katsuhiko Sato, Satoshi Okada, Hisashi Hozumi, Hideo Shimada, Hideharu Okano, Osamu Ozaki
1993	A	`conf`	Fault tolerance of a functionally adaptive and robust manipulator. IROS Shinya Kotosaka, Hajime Asama, Hayato Kaetsu, Isao Endo, Katsuhiko Sato, Satoshi Okada, Ryoichi Nakayama
1992	J	`jnl`	Consideration of poly-Si loaded cell capacity limits for low-power and high-speed SRAMs. IEEE J. Solid State Circuits Hideo Kato, Katsuhiko Sato, Masataka Matsui, H. Shibata, K. Hashimoto, Takayuki Ootani, Kiyofumi Ochii
1992	J	`jnl`	Intelligent manipulator system with nonsymmetric and redundant master-slave. J. Field Robotics Katsuhiko Sato, Motohiko Kimura, Akira Abe
1990	J	`jnl`	A 4-Mb CMOS SRAM with a PMOS thin-film-transistor load cell. IEEE J. Solid State Circuits Takayuki Ootani, Shigeyuki Hayakawa, Masakazu Kakumu, Akira Aona, Masaaki Kinugawa, Hideki Takeuchi, Kazuhiro Noguchi, Tomoaki Yabe, Katsuhiko Sato, Kenji Maeguchi, Kiyofumi Ochii
1989	J	`jnl`	An 8-ns 1-Mbit ECL BiCMOS SRAM with double-latch ECL-to-CMOS-level converters. IEEE J. Solid State Circuits Masataka Matsui, Hiroshi Momose, Yukihiro Urakawa, Takeo Maeda, Azuma Suzuki, Nobuaki Urakawa, Katsuhiko Sato, Jun'ichi Matsunaga, Kiyofumi Ochii
1988	J	`jnl`	A 30- mu A data-retention pseudostatic RAM with virtually static RAM mode. IEEE J. Solid State Circuits Kazuhiro Sawada, Takayasu Sakurai, Kazutaka Nogami, Katsuhiko Sato, Tsukasa Shirotori, Masakazu Kakuma, Shigeru Morita, Masaaki Kinugawa, Tetsuya Asami, Kazuhito Narita, Jun-Ichi Matsunaga, Akira Higuchi, Mitsuo Isobe, Tetsuya Iizuka