Karthik Chandrasekar

12 papers A* 2A 3C 2Journal 3Unranked 2
YearRankTypeTitle / Venue / Authors
2016 J jnl
Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling.
IEEE Trans. Computers
Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens
2014 A conf
Exploiting expendable process-margins in DRAMs for run-time performance optimization.
DATE
Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens
2013 A conf
System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs.
DATE
Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2013 — conf
TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration.
RAPIDO
Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar
2013 A* conf
Towards variation-aware system-level power estimation of DRAMs: an empirical approach.
DAC
Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2013 J jnl
Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow.
SIGBED Rev.
Kees Goossens, Arnaldo Azevedo, Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Martijn Koedam, Yonghui Li, Davit Mirzoyan, Anca Mariana Molnos, Ashkan Beyranvand Nejad, Andrew Nelson, Shubhendu Sinha
2012 C conf
A Predictor-Based Power-Saving Policy for DRAM Memories.
DSD
Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens
2012 A* conf
Run-time power-down strategies for real-time SDRAM memory controllers.
DAC
Karthik Chandrasekar, Benny Akesson, Kees Goossens
2011 C conf
Improved Power Modeling of DDR SDRAMs.
DSD
Karthik Chandrasekar, Benny Akesson, Kees Goossens
2008 — conf
Design for Testability of Functional Cores in High Performance Node Architectures.
DELTA
Nagarajan Venkateswaran, Karthik Chandrasekar, Shrikanth Ganapathy
2008 A conf
On the concept of simultaneous execution of multiple applications on hierarchically based cluster and the silicon operating system.
IPDPS
N. Venkateswaran, Vinoth Krishnan Elangovan, Karthik Ganesan, TP Ramnath Sai Sagar, Sriram Aananthakrishanan, Shreyas Ramalingam, Shyamsundar Gopalakrishnan, Madhavan Manivannan, Deepak Srinivasan, Viswanath Krishnamurthy, Karthik Chandrasekar, Viswanath Venkatesan, Balaji Subramaniam, Vidya Sangkar L, Aravind Vasudevan, Shrikanth Ganapathy, Sriram Murali, Murali Thyagarajan
2007 J jnl
Future generation supercomputers I: a paradigm for node architecture.
SIGARCH Comput. Archit. News
Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan