Karsten Sohr

65 papers A 2B 4C 14Misc 6Journal 14Unranked 24
YearRankTypeTitle / Venue / Authors
2025 C conf
ICEC
Mehrdad Bahrini, Violetta Burdina, Karsten Sohr, Rainer Malaka
2025 conf
ESORICS (4)
Mehrdad Bahrini, Alexander Herbst, Merle Freye, Matthias Kohn, Karsten Sohr, Rainer Malaka
2024 C conf
ICEC
Mehrdad Bahrini, Joffrey Weglewski, Karsten Sohr, Rainer Malaka
2024 C conf
SACMAT
Carlos E. Rubio-Medrano, Akash Kotak, Wenlu Wang, Karsten Sohr
2023 conf
ESORICS (4)
Lorenz Hüther, Karsten Sohr, Bernhard J. Berger, Hendrik Rothe, Stefan Edelkamp
2023 conf
FPS (2)
Denis Obrezkov, Karsten Sohr
2023 J jnl
Datenschutz und Datensicherheit (dud)
Mehrdad Bahrini, Thomas Münder, Karsten Sohr, Rainer Malaka
2022 Misc conf
MuC
Denis Obrezkov, Karsten Sohr, Rainer Malaka
2022 Misc conf
NordiCHI
Mehrdad Bahrini, Nima Zargham, Alexander Wolff, Dennis-Kenji Kipker, Karsten Sohr, Rainer Malaka
2021 B conf
TrustBus
Denis Obrezkov, Karsten Sohr, Rainer Malaka
2021 J jnl
Datenschutz und Datensicherheit
Henrik Reichmann, Malte Elson, Nele Borgert, Dennis-Kenji Kipker, Rainer Malaka, Karsten Sohr, Mehrdad Bahrini
2021 C conf
SCAM
Rodrigue Wete Nguempnang, Bernhard J. Berger, Karsten Sohr
2020 C conf
ICEC
Mehrdad Bahrini, Nima Zargham, Johannes Pfau, Stella Lemke, Karsten Sohr, Rainer Malaka
2020 conf
CHI PLAY (Companion)
Mehrdad Bahrini, Nima Zargham, Johannes Pfau, Stella Lemke, Karsten Sohr, Rainer Malaka
2020 conf
Modellierung
Marcel Schuster, Markus Germeier, Frank Hilken, Martin Gogolla, Karsten Sohr
2020 J jnl
J. Object Technol.
Christian Maeder, Karsten Sohr, Rodrigue Wete Nguempnang, Nils Meyer-Larsen, Rainer Müller
2020 J jnl
Datenschutz und Datensicherheit
Mehmet Kus, Karsten Sohr
2020 C conf
SCAM
Bernhard J. Berger, Rodrigue Wete Nguempnang, Karsten Sohr, Rainer Koschke
2020 J jnl
Softw. Qual. J.
Michaela Bunke, Karsten Sohr
2019 conf
CHI Extended Abstracts
Mehrdad Bahrini, Nina Wenig, Marcel Meissner, Karsten Sohr, Rainer Malaka
2019 Misc conf
MuC
Mehrdad Bahrini, Georg Volkmar, Jonas Schmutte, Nina Wenig, Karsten Sohr, Rainer Malaka
2019 C conf
SCAM
Bernhard J. Berger, Karsten Sohr, Rainer Koschke
2019 C conf
SACMAT
Bernhard J. Berger, Christian Maeder, Rodrigue Wete Nguempnang, Karsten Sohr, Carlos E. Rubio-Medrano
2019 conf
CHI PLAY (Companion)
Nima Zargham, Mehrdad Bahrini, Georg Volkmar, Dirk Wenig, Karsten Sohr, Rainer Malaka
2016 conf
ESSoS
Bernhard J. Berger, Karsten Sohr, Rainer Koschke
2016 conf
OCL@MoDELS
Frank Hilken, Marcel Schuster, Karsten Sohr, Martin Gogolla
2015 J jnl
EAI Endorsed Trans. Collab. Comput.
Carlos E. Rubio-Medrano, Gail-Joon Ahn, Karsten Sohr
2015 conf
ESSoS
Lars Hamann, Karsten Sohr, Martin Gogolla
2015 J jnl
Int. J. Inf. Sec.
Tanveer Mustafa, Karsten Sohr
2014 C conf
CollaborateCom
Carlos E. Rubio-Medrano, Gail-Joon Ahn, Karsten Sohr
2014 conf
Sicherheit
Steffen Bartsch, Bernhard J. Berger, Eric Bodden, Achim D. Brucker, Jens Heider, Mehmet Kus, Sönke Maseberg, Karsten Sohr, Melanie Volkamer
2013 J jnl
Math. Struct. Comput. Sci.
Mirco Kuhlmann, Karsten Sohr, Martin Gogolla
2013 conf
CSMR
Bernhard J. Berger, Karsten Sohr, Rainer Koschke
2013 B conf
ARES
Steffen Bartsch, Bernhard J. Berger, Michaela Bunke, Karsten Sohr
2013 conf
GEMOC+AMINO@MoDELS
Oliver Hofrichter, Martin Gogolla, Karsten Sohr
2013 B conf
COMPSAC
Carlos E. Rubio-Medrano, Gail-Joon Ahn, Karsten Sohr
2012 Misc conf
SEC
Bernhard J. Berger, Karsten Sohr
2012 J jnl
Inf. Softw. Technol.
Karsten Sohr, Mirco Kuhlmann, Martin Gogolla, Hongxin Hu, Gail-Joon Ahn
2012 B conf
ARES
Henk Birkholz, Ingo Sieverdingbeck, Karsten Sohr, Carsten Bormann
2012 J jnl
CoRR
Steffen Bartsch, Karsten Sohr, Michaela Bunke, Oliver Hofrichter, Bernhard J. Berger
2011 conf
WCRE
Bernhard J. Berger, Michaela Bunke, Karsten Sohr
2011 conf
ESSoS
Michaela Bunke, Karsten Sohr
2011 conf
SSIRI
Mirco Kuhlmann, Karsten Sohr, Martin Gogolla
2011 Misc conf
SAC
Karsten Sohr, Tanveer Mustafa, Adrian Nowak
2011 J jnl
Datenschutz und Datensicherheit
Henk Birkholz, Carsten Elfers, Bernd Samjeske, Karsten Sohr
2010 conf
perspeGKtive
Raffael Rittmeier, Karsten Sohr
2010 conf
ESSoS
Karsten Sohr, Bernhard J. Berger
2010 C conf
EUC
Nicolai Kuntze, Roland Rieke, Günther Diederich, Richard Sethmann, Karsten Sohr, Tanveer Mustafa, Kai-Oliver Detken
2010 conf
SESS@ICSE
Tanveer Mustafa, Michael Drouineaud, Karsten Sohr
2010 C conf
IDEAL
Carsten Elfers, Mirko Horstmann, Karsten Sohr, Otthein Herzog
2008 J jnl
IEEE Trans. Knowl. Data Eng.
Karsten Sohr, Michael Drouineaud, Gail-Joon Ahn, Martin Gogolla
2008 A conf
ACSAC
Karsten Sohr, Tanveer Mustafa, Xinyu Bao, Gail-Joon Ahn
2008 J jnl
Electron. Commun. Eur. Assoc. Softw. Sci. Technol.
Tanveer Mustafa, Karsten Sohr, Duc-Hanh Dang, Michael Drouineaud, Stefan Kowski
2008 C conf
CollaborateCom
Steffen Bartsch, Karsten Sohr, Carsten Bormann
2007 conf
MuC (Workshopband)
Mehmet Kus, Michael Lawo, Marc Ronthaler, Richard Sethmann, Karsten Sohr, Katja Wind
2006 C conf
SACMAT
Andreas Schaad, Volkmar Lotz, Karsten Sohr
2005 conf
SESS@ICSE
Karsten Sohr, Gail-Joon Ahn, Lars Migge
2005 J jnl
ACM SIGSOFT Softw. Eng. Notes
Karsten Sohr, Gail-Joon Ahn, Lars Migge
2005 Misc conf
SAC
Karsten Sohr, Michael Drouineaud, Gail-Joon Ahn
2005 A conf
ESORICS
Karsten Sohr, Gail-Joon Ahn, Martin Gogolla, Lars Migge
2004 conf
QSIC
Michael Drouineaud, Maksym Bortin, Paolo Torrini, Karsten Sohr
2003 C conf
TIME
Till Mossakowski, Michael Drouineaud, Karsten Sohr
2001
Karsten Sohr
2001 conf
IICS
Steffen Deter, Karsten Sohr
1999 conf
Java-Informations-Tage
Karsten Sohr
redb/extractors/decompiler/bninja/arch/x86.py
← Index redb/extractors/decompiler/bninja/arch/x86.py python
from binaryninja.enums import (
    InstructionTextTokenType,
)

# Support both package and standalone imports
try:
    from .architecture import Architecture
except ImportError:
    # Fallback to absolute imports (for multiprocessing spawned processes)
    from redb.extractors.decompiler.bninja.arch.architecture import Architecture


class Arch_x86(Architecture):
    """The concrete class for architecture-dependent details for x86_64"""

    def __init__(self):
        # general purpose registers for 64bits
        self.gpr_64 = [
            "RAX",
            "RBX",
            "RCX",
            "RDX",
            "RSI",
            "RDIR9",
            "R10",
            "R11",
            "R12",
            "R13",
            "R14",
            "R15",
        ]

        self.gpr_32 = [
            "EAX",
            "EBX",
            "ECX",
            "EDX",
            "ESI",
            "EDI",
            "R8D",
            "R9D",
            "R10D",
            "R11D",
            "R12D",
            "R13D",
            "R14D",
            "R15D",
        ]

        self.gpr_16 = [
            "AX",
            "BX",
            "CX",
            "DX",
            "SI",
            "DI",
            "R8W",
            "R9W",
            "R10W",
            "R11W",
            "R12W",
            "R13W",
            "R14W",
            "R15W",
        ]

        self.gpr_8 = [
            "AL",
            "BL",
            "CL",
            "DL",
            "SIL",
            "DIL",
            "R8B",
            "R9B",
            "R10B",
            "R11B",
            "R12B",
            "R13B",
            "R14B",
            "R15B",
        ]

        self.fpu_x87 = ["ST0", "ST1", "ST2", "ST3", "ST4", "ST5", "ST6", "ST7"]

        self.sse_xmm = [
            "XMM0",
            "XMM1",
            "XMM2",
            "XMM3",
            "XMM4",
            "XMM5",
            "XMM6",
            "XMM7",
            "XMM8",
            "XMM9",
            "XMM10",
            "XMM11",
            "XMM12",
            "XMM13",
            "XMM14",
            "XMM15",
        ]

        self.avx_ymm = [
            "YMM0",
            "YMM1",
            "YMM2",
            "YMM3",
            "YMM4",
            "YMM5",
            "YMM6",
            "YMM7",
            "YMM8",
            "YMM9",
            "YMM10",
            "YMM11",
            "YMM12",
            "YMM13",
            "YMM14",
            "YMM15",
        ]
        self.flags = ["FLAGS", "EFLAGS", "RFLAGS"]
        self.stack_registers = ["RBP", "RSP", "SP", "BP"]
        self.size = 8
        self.global_registers = (
            self.gpr_64
            + self.gpr_32
            + self.gpr_16
            + self.gpr_8
            + self.fpu_x87
            + self.sse_xmm
            + self.avx_ymm
        )
        self.opcode_categories = self._initialize_opcode_categories()

        ## instructions
        self.instructions = []

    def is_register(self, register):
        register = register.upper()
        return register in self.global_registers

    def is_general_purpose_register(self, register):
        register = register.upper()
        return (
            register in self.gpr_64
            or register in self.gpr_32
            or register in self.gpr_16
            or register in self.gpr_8
        )

    def is_stack_register(self, register):
        register = register.upper()
        return register in self.stack_registers

    def is_xmm_register(self, register):
        register = register.upper()
        return register in self.sse_xmm

    def is_control_flow(self, instr_tokens):
        return False

    def is_control_flow_instruction(self, instr_tokens):
        """Check if an instruction is a control flow instruction (jump, call, return, loop)."""
        try:
            # Extract the mnemonic from the instruction tokens
            mnemonic = None
            for token in instr_tokens:
                if token.type == InstructionTextTokenType.InstructionToken:
                    mnemonic = token.text.upper()
                    break

            if not mnemonic:
                return False

            # Check if it's a jump, call, return, or loop instruction
            return (
                mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
                or mnemonic == "CALL"  # Function calls
                or mnemonic == "RET"  # Return
                or mnemonic == "RETN"  # Another form of return
                or mnemonic.startswith("LOOP")
            )  # Loop instructions

        except Exception as e:
            print(e)
            # If we can't determine, assume it's not a control flow instruction
            return False

    def is_control_flow_instruction_by_mnemonic(self, mnemonic):
        """Check if an instruction is a control flow instruction based on its mnemonic."""
        if not mnemonic:
            return False

        mnemonic = mnemonic.upper()
        return (
            mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
            or mnemonic == "CALL"  # Function calls
            or mnemonic == "RET"  # Return
            or mnemonic == "RETN"  # Another form of return
            or mnemonic.startswith("LOOP")
        )

    def _initialize_opcode_categories(self):
        """Initialize mapping of opcodes to categories similar to Ghidra's implementation."""
        opcode_categories = {}
        opcode_index = {}  # Add this to mimic Ghidra's opcodeIndex

        # Define common opcodes array similar to Ghidra's COMMON_OPCODES
        COMMON_OPCODES = [
            # Core instructions (tracked individually)
            "MOV",
            "PUSH",
            "POP",
            "LEA",
            "CALL",
            "RET",  # Data movement and control
            "ADD",
            "SUB",
            "MUL",
            "DIV",  # Basic arithmetic
            "AND",
            "OR",
            "XOR",
            "NOT",  # Logical operations
            "JMP",
            "JE",
            "JNE",  # Basic jumps
            "TEST",
            "CMP",  # Comparisons
            # Grouped categories (aggregated tracking)
            "SIMD_MOVE",  # MOVAPS, MOVDQA, MOVDQU, etc.
            "COND_JUMP_EXT",  # Other conditional jumps (JG, JL, JGE, etc.)
            "STRING_OP",  # MOVS, STOS, LODS, SCAS, CMPS
            "STACK_ADV",  # ENTER, LEAVE, PUSHA, POPA
            "ARITHMETIC_ADV",  # IMUL, IDIV, ADC, SBB
            "BIT_OP",  # SHL, SHR, SAR, ROL, ROR, etc.
            "FPU_OP",  # FLD, FST, FADD, etc.
            "SYSTEM_OP",  # SYSCALL, INT, SYSENTER
            "CRYPTO_OP",  # AES*, SHA* instructions
            "MISC_OP",  # Rare but interesting (CPUID, RDTSC, etc.)
        ]

        # Create index map like Ghidra
        for i, opcode in enumerate(COMMON_OPCODES):
            opcode_index[opcode] = i

        # Now categorize opcodes using if/elif/else structure like in Ghidra
        for opcode in COMMON_OPCODES:
            # String Operations (checking these first to avoid MOV confusion)
            if opcode.startswith("MOVS") or opcode in [
                "STOS",
                "LODS",
                "SCAS",
                "CMPS",
                "REP",
                "REPE",
                "REPNE",
            ]:
                opcode_categories[opcode] = "STRING_MANIPULATION"

            # Data Movement (after string ops to avoid MOVS confusion)
            elif opcode.startswith("MOV") or opcode in ["LEA", "XCHG"]:
                opcode_categories[opcode] = "DATA_MOVEMENT"

            # Stack Operations
            elif opcode in ["PUSH", "POP", "ENTER", "LEAVE", "PUSHA", "POPA"]:
                opcode_categories[opcode] = "STACK_MANAGEMENT"

            # Control Flow (non-conditional)
            elif opcode in ["JMP", "CALL", "RET"]:
                opcode_categories[opcode] = "CONTROL_FLOW"

            # Conditional Jumps and Loops
            elif opcode.startswith("J") or opcode.startswith("LOOP"):
                opcode_categories[opcode] = "CONDITIONAL_JUMP"

            # Arithmetic
            elif opcode in [
                "ADD",
                "SUB",
                "MUL",
                "DIV",
                "IMUL",
                "IDIV",
                "ADC",
                "SBB",
                "INC",
                "DEC",
                "NEG",
            ]:
                opcode_categories[opcode] = "ARITHMETIC"

            # Logical
            elif opcode in ["AND", "OR", "XOR", "NOT", "TEST", "CMP"]:
                opcode_categories[opcode] = "LOGICAL"

            # Shifts & Rotates
            elif opcode in ["SHL", "SHR", "SAR", "SAL", "ROL", "ROR", "RCL", "RCR"]:
                opcode_categories[opcode] = "SHIFT_ROTATE"

            # System & Interrupts
            elif opcode in [
                "SYSCALL",
                "INT",
                "SYSENTER",
                "SYSEXIT",
                "SGDT",
                "SIDT",
                "SLDT",
                "WRMSR",
                "RDMSR",
            ]:
                opcode_categories[opcode] = "SYSTEM_CALLS"

            # Floating Point
            elif opcode.startswith("F"):
                opcode_categories[opcode] = "FPU_ARITHMETIC"

            # System Information and Random Number Generation
            elif opcode in ["PUSHF", "POPF", "CPUID", "RDTSC", "RDRAND", "RDSEED"]:
                opcode_categories[opcode] = "CPU_FEATURES"

            # Cryptography
            elif opcode.startswith("AES") or opcode.startswith("SHA"):
                opcode_categories[opcode] = "CRYPTOGRAPHIC"

            # Miscellaneous (including flag operations)
            else:
                opcode_categories[opcode] = "MISC"

        # Additional categorization for opcodes not in COMMON_OPCODES
        # This can be used in the normalize_opcode method

        # Store both maps as instance variables
        # self.opcode_categories = opcode_categories
        self.opcode_index = opcode_index

        return opcode_categories

    def is_simd_register(self, register):
        return register in self.sse_xmm