Kari Tiensyrjä

26 papers A 1B 2C 9Journal 5Unranked 9

Year	Rank	Type	Title / Venue / Authors
2013	J	`jnl`	Early-phase performance exploration of embedded systems with ABSOLUT framework. J. Syst. Archit. Janne Vatjus Anttila, Jari Kreku, Juha Korpi, Subayal Khan, Jukka Saastamoinen, Kari Tiensyrjä
2011	—	`conf`	Multi-threading support for system-level performance simulation of multi-core architectures. ARCS Workshops Jukka Saastamoinen, Subayal Khan, Kari Tiensyrjä, Tapio Taipale
2011	C	`conf`	System Level Performance Simulation of Distributed GENESYS Applications on Multi-core Platforms. DASC Subayal Aftab Khan, Jukka Saastamoinen, Kari Tiensyrjä, Jari Nurmi
2010	A	`conf`	Automatic workload generation for system-level exploration based on modified GCC compiler. DATE Jari Kreku, Kari Tiensyrjä, Geert Vanmeerbeeck
2010	—	`conf`	From Y-chart to seamless integration of application design and performance simulation. SoC Subayal Khan, Eila Ovaska, Kari Tiensyrjä, Jari Nurmi
2010	C	`conf`	Instantiating GENESYS Application Architecture Modeling via UML 2.0 Constructs and MARTE Profile. DSD Subayal Khan, Kari Tiensyrjä, Jari Nurmi
2010	—	`conf`	Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. ISVLSI Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin
2010	—	`conf`	The MOSART Mapping Optimization for Multi-Core ARchiTectures. ISVLSI (Selected papers) Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin
2009	C	`conf`	Linking GENESYS application architecture modelling with platform performance simulation. FDL Subayal Khan, Susanna Pantsar-Syväniemi, Jari Kreku, Kari Tiensyrjä, Juha-Pekka Soininen
2008	C	`conf`	Application - Platform Performance Modeling and Evaluation. FDL Jari Kreku, Mika Hoppari, Tuomo Kestilä, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrjä
2008	—	`conf`	Application Workload and SystemC Platform Modeling for Performance Evaluation. FDL (Selected Papers) Jari Kreku, Mika Hoppari, Tuomo Kestilä, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrjä
2008	J	`jnl`	Combining UML2 Application and SystemC Platform Modelling for Performance Evaluation of Real-Time Embedded Systems. EURASIP J. Embed. Syst. Jari Kreku, Mika Hoppari, Tuomo Kestilä, Yang Qu, Juha-Pekka Soininen, Per Andersson, Kari Tiensyrjä
2008	J	`jnl`	Design Flow Instantiation for Run-Time Reconfigurable Systems: A Case Study. EURASIP J. Embed. Syst. Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi
2007	C	`conf`	System-Level Design for Partially Reconfigurable Hardware. ISCAS Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi
2007	C	`conf`	SystemC workload model generation from UML for performance simulation. FDL Jari Kreku, Mika Hoppari, Kari Tiensyrjä, Per Andersson
2006	C	`conf`	Layered UML Workload and SystemC Platform Models. FDL Jari Kreku, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrjä
2006	B	`conf`	System Level Architecture Exploration for Reconfigurable Systems On Chip. FPL Konstantinos Masselos, Kari Tiensyrjä, Yang Qu, Nikolaos S. Voros, Miroslav Cupák, Luc Rijnders, Marko Pettissalo
2005	C	`conf`	SystemC-based Design Methodology for Reconfigurable System-on-Chip. DSD Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen
2004	B	`conf`	System-Level Modeling of Dynamically Reconfigurable Co-processors. FPL Yang Qu, Kari Tiensyrjä, Kostas Masselos
2004	C	`conf`	SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip. FDL Kari Tiensyrjä, Miroslav Cupák, Kostas Masselos, Marko Pettissalo
2002	—	`conf`	A Network on Chip Architecture and Design Methodology. ISVLSI Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani
1997	—	`conf`	Interactive codesign for real-time embedded control systems: task graph generation from SA/VHDL models. EUROMICRO Sien-An Ong, Kari Tiensyrjä, Lech Józwiak
1995	—	`conf`	Cosimulation of real-time control systems. EURO-DAC Juha-Pekka Soininen, Tuomo Huttunen, Kari Tiensyrjä, Hannu Heusala
1994	—	`conf`	Boundary Scan Testing Combined with Power Supply Current Monitoring. EDAC-ETC-EUROASIC Matti Kärkkäinen, Kari Tiensyrjä, Matti Weissenfelt
1989	J	`jnl`	SW/HW-partitioning of real-time embedded systems. Microprocessing and Microprogramming Juha-Pekka Soininen, Matti Sipola, Kari Tiensyrjä
1988	J	`jnl`	Real-time structured analysis in system level design of embedded ASICs. Microprocess. Microprogramming Timo Juntunen, Jorma Kivelä, Auli Reinikka, Matti Sipola, Juha-Pekka Soininen, Kari Tiensyrjä, Tuomo Tikkanen