Karen Maex - RankMe

18 papers A 4Journal 9Unranked 5

Year	Rank	Type	Title / Venue / Authors
2007	J	`jnl`	Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? CoRR Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich
2006	—	`conf`	Impact of interconnect resistance increase on system performance of low power and high performance designs. SLIP Mandeep Bamal, Youssef Travaly, Wenqi Zhang, Michele Stucchi, Karen Maex
2006	J	`jnl`	Read Stability and Write-Ability Analysis of SRAM Cells for Nanometer Technologies. IEEE J. Solid State Circuits Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene
2006	—	`conf`	Statistically Aware SRAM Memory Array Design. ISQED Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene
2005	J	`jnl`	A new method for the lifetime determination of submicron metal interconnects by means of a parallel test structure. Microelectron. Reliab. Kris Vanstreels, Marc D'Olieslaeger, Ward De Ceuninck, Jan D'Haen, Karen Maex
2005	A	`conf`	Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? DATE Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich
2005	J	`jnl`	Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability. Microelectron. Reliab. Yunlong Li, Zsolt Tökei, Philippe Roussel, Guido Groeseneken, Karen Maex
2005	A	`conf`	Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules. DATE Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex
2004	A	`conf`	How Can System-Level Design Solve the Interconnect Technology Scaling Problem? DATE Francky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson
2004	—	`conf`	Interconnect width selection for deep submicron designs using the table lookup method. SLIP Mandeep Bamal, Evelyn Grossar, Michele Stucchi, Karen Maex
2003	—	`conf`	Global interconnect trade-off for technology over memory modules to application level: case study. SLIP Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex
2002	J	`jnl`	A CAD-oriented analytical model for frequency-dependent series resistance and inductance of microstrip on-chip interconnect on silicon substrate. Microprocess. Microsystems Hasan Ymeri, Bart Nauwelaers, Karen Maex, Servaas Vandenberghe, David De Roest
2002	J	`jnl`	Frequency dependence in interline capacitance measurements. IEEE Trans. Instrum. Meas. Michele Stucchi, Karen Maex
2002	—	`conf`	Interconnect exploration for future wire dominated technologies. SLIP Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex
2002	A	`conf`	Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate. DATE Hasan Ymeri, Bart Nauwelaers, Karen Maex, David De Roest, Michele Stucchi, Servaas Vandenberghe
2001	J	`jnl`	Frequency-dependent mutual resistance and inductance formulas for coupled IC interconnects on an Si-SiO2 substrate. Integr. Hasan Ymeri, Bart Nauwelaers, Karen Maex
2001	J	`jnl`	On the two-dimensional capacitance calculation of multiconductor multilayered interconnects. Ann. des Télécommunications Hasan Ymeri, Bart Nauwelaers, Karen Maex
2000	J	`jnl`	Computation of capacitance matrix for integrated circuit interconnects using semi-analytic Green's function method. Integr. Hasan Ymeri, Bart Nauwelaers, Karen Maex