Karel Heyse

15 papers A* 1B 4Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2015 A* conf
Avoiding transitional effects in dynamic circuit specialisation on FPGAs.
DAC
Karel Heyse, Dirk Stroobandt
2015 J jnl
Enabling FPGA routing configuration sharing in dynamic partial reconfiguration.
Des. Autom. Embed. Syst.
Brahim Al Farisi, Karel Heyse, Karel Bruneel, João M. P. Cardoso, Dirk Stroobandt
2015 B conf
Estimating circuit delays in FPGAs after technology mapping.
FPL
Berg Severens, Elias Vansteenkiste, Karel Heyse, Dirk Stroobandt
2015 J jnl
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Microprocess. Microsystems
Dionisios N. Pnevmatikatos, Kyprianos Papadimitriou, Tobias Becker, Peter Böhm, Andreas Brokalakis, Karel Bruneel, Catalin Bogdan Ciobanu, Tom Davidson, Georgi Gaydadjiev, Karel Heyse, Wayne Luk, Xinyu Niu, Ioannis Papaefstathiou, Danilo Pau, Oliver Pell, Christian Pilato, Marco D. Santambrogio, Donatella Sciuto, Dirk Stroobandt, Tim Todman, Elias Vansteenkiste
2015 J jnl
Identification of Dynamic Circuit Specialization Opportunities in RTL Code.
ACM Trans. Reconfigurable Technol. Syst.
Tom Davidson, Elias Vansteenkiste, Karel Heyse, Karel Bruneel, Dirk Stroobandt
2015 J jnl
On the Impact of Replacing Low-Speed Configuration Buses on FPGAs with the Chip's Internal Configuration Infrastructure.
ACM Trans. Reconfigurable Technol. Syst.
Karel Heyse, Jente Basteleus, Brahim Al Farisi, Dirk Stroobandt, Oliver Kadlcek, Oliver Pell
2015 J jnl
TCONMAP: Technology Mapping for Parameterised FPGA Configurations.
ACM Trans. Design Autom. Electr. Syst.
Karel Heyse, Brahim Al Farisi, Karel Bruneel, Dirk Stroobandt
2014 — conf
Improving reconfiguration speed for dynamic circuit specialization using placement constraints.
ReConFig
Amit Kulkarni, Tom Davidson, Karel Heyse, Dirk Stroobandt
2014 — conf
On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA's Configuration Infrastructure.
ARC
Karel Heyse, Dirk Stroobandt, Oliver Kadlcek, Oliver Pell
2014 — conf
Performance Evaluation of Dynamic Circuit Specialization on Xilinx FPGAs.
FPGAworld
Amit Kulkarni, Karel Heyse, Tom Davidson, Dirk Stroobandt
2014 — conf
Reducing the overhead of dynamic partial reconfiguration for multi-mode circuits.
FPT
Brahim Al Farisi, Karel Heyse, Dirk Stroobandt
2013 B conf
Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS.
FPL
Karel Heyse, Tom Davidson, Elias Vansteenkiste, Karel Bruneel, Dirk Stroobandt
2012 — conf
Automating Reconfiguration Chain Generation for SRL-Based Run-Time Reconfiguration.
ARC
Karel Heyse, Brahim Al Farisi, Karel Bruneel, Dirk Stroobandt
2012 B conf
Mapping logic to reconfigurable FPGA routing.
FPL
Karel Heyse, Karel Bruneel, Dirk Stroobandt
2011 B conf
Memory-Efficient and Fast Run-Time Reconfiguration of Regularly Structured Designs.
FPL
Brahim Al Farisi, Karel Heyse, Karel Bruneel, Dirk Stroobandt