Kangmin Hu

18 papers C 2Journal 10Unranked 6
YearRankTypeTitle / Venue / Authors
2024 J jnl
Evaluation Method of Impulse Voltage Scale Factor Based on Energy Spectral Density.
IEEE Trans. Instrum. Meas.
Zhaozhi Long, Feng Zhou, Jiawei Fan, Yinglong Diao, Wenting Li, Zhehao Wang, Kangmin Hu, Fuchang Lin
2023 J jnl
Development of a Wideband Precision Electric Field Measuring Sensor.
Sensors
Zhaozhi Long, Feng Zhou, Fuchang Lin, Jiawei Fan, Wenting Li, Yinglong Diao, Kangmin Hu
2020 C conf
A 1.575GHz, 1.63mW CMOS Injection-Locked Ring Oscillator Powered by FBAR-Based PLL Reference.
ISCAS
Kangmin Hu, Julie R. Hu, Brian Otis, Patrick Yin Chiang
2017 — conf
29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS.
ISSCC
Jun Cao, Delong Cui, Ali Nazemi, Tim He, Guansheng Li, Burak Çatli, Mehdi Khanpour, Kangmin Hu, Tamer A. Ali, Heng Zhang, Hairong Yu, Ben Rhew, Shiwei Sheng, Yonghyun Shim, Bo Zhang, Afshin Momtaz
2015 — conf
3.1 A 28Gb/s multi-standard serial-link transceiver for backplane applications in 28nm CMOS.
ISSCC
Bo Zhang, Karapet Khanoyan, Hamid Hatamkhani, Haitao Tong, Kangmin Hu, Siavash Fallahi, Kambiz Vakilian, Anthony Brewster
2015 — conf
3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS.
ISSCC
Ali Nazemi, Kangmin Hu, Burak Çatli, Delong Cui, Ullas Singh, Tim He, Zhi Chao Huang, Bo Zhang, Afshin Momtaz, Jun Cao
2015 J jnl
A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS.
IEEE J. Solid State Circuits
Bo Zhang, Karapet Khanoyan, Hamid Hatamkhani, Haitao Tong, Kangmin Hu, Siavash Fallahi, Mohammed M. Abdul-Latif, Kambiz Vakilian, Ichiro Fujimori, Anthony Brewster
2013 J jnl
A 0.47-0.66 pJ/bit, 4.8-8 Gb/s I/O Transceiver in 65 nm CMOS.
IEEE J. Solid State Circuits
Young-Hoon Song, Rui Bai, Kangmin Hu, Noah Hae-Woong Yang, Patrick Yin Chiang, Samuel Palermo
2012 J jnl
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking.
IEEE J. Solid State Circuits
Kangmin Hu, Rui Bai, Tao Jiang, Chao Ma, Ahmed Ragab, Samuel Palermo, Patrick Yin Chiang
2012 J jnl
A Comparative Study of 20-Gb/s NRZ and Duobinary Signaling Using Statistical Analysis.
IEEE Trans. Very Large Scale Integr. Syst.
Kangmin Hu, Larry Wu, Patrick Yin Chiang
2012 J jnl
A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS.
IEEE J. Solid State Circuits
Tao Jiang, Wing Liu, Freeman Y. Zhong, Charlie Zhong, Kangmin Hu, Patrick Yin Chiang
2012 — conf
A low-power, capacitively-divided, ring oscillator with digitally adjustable voltage swing.
VLSI-DAT
Tao Jiang, Kangmin Hu, Patrick Yin Chiang
2011 J jnl
A 90 nm-CMOS, 500 Mbps, 3-5 GHz Fully-Integrated IR-UWB Transceiver With Multipath Equalization Using Pulse Injection-Locking for Receiver Phase Synchronization.
IEEE J. Solid State Circuits
Changhui Hu, Rahul Khanna, Jay J. Nejedlo, Kangmin Hu, Huaping Liu, Patrick Yin Chiang
2011 — conf
Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS.
CICC
Kangmin Hu, Tao Jiang, Samuel Palermo, Patrick Yin Chiang
2011 J jnl
Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links.
J. Electr. Comput. Eng.
Ahmed Ragab, Yang Liu, Kangmin Hu, Patrick Chiang, Samuel Palermo
2010 J jnl
A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS.
IEEE J. Solid State Circuits
Kangmin Hu, Tao Jiang, Jingguang Wang, Frank O'Mahony, Patrick Yin Chiang
2009 C conf
Comparison of On-die Global Clock Distribution Methods for Parallel Serial Links.
ISCAS
Kangmin Hu, Tao Jiang, Patrick Chiang
2008 — conf
A CMOS 434/868 MHz FSK/OOK transmitter with integrated fractional-N PLL.
APCCAS
Feng Zhao, Xiaoping Gao, Huajiang Zhang, Kangmin Hu, Zhiliang Hong