Kang-Il Cho

23 papers C 1Journal 8Unranked 14
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Hybrid Voltage-Time Domain Pipelined ADC With Reference-Embedded Time-Domain Residues.
IEEE J. Solid State Circuits
Jae-Geun Lim, Jun-Ho Boo, Jae-Hyuk Lee, Hyoung-Jung Kim, Byeongho Yu, Kang-Il Cho, Sungho Lee, Un-Ku Moon, Gil-Cho Ahn
2025 — conf
A Two-Step ADC with a Separate DAC Method for Enhanced Sub-Quantizer Settling Condition.
ICEIC
Jae-Geun Lim, Jun-Ho Boo, Hyoung-Jung Kim, Jae-Hyuk Lee, Kang-Il Cho, Gil-Cho Ahn
2025 J jnl
Design considerations for ESD protection diodes in bulk FinFET technology.
IEICE Electron. Express
Dae-Yeol You, Jaeho Lee, Kang-Il Cho
2024 — conf
A CMOS Analog Front-End for Hall Sensor Readout IC.
ICEIC
Kang-Il Cho, Jun-Ho Boo, Jae-Geun Lim, Gil-Cho Ahn
2024 — conf
A High Holding Voltage Diode-Triggered SCR for Low-Voltage ESD Application.
ICEIC
Sora Park, Yoonseo Choi, Sungho Lee, Kang-Il Cho
2023 J jnl
A Single-Loop Third-Order 10-MHz BW Source-Follower-Integrator Based Discrete-Time Delta-Sigma ADC.
IEEE Trans. Circuits Syst. II Express Briefs
Ho-Jin Kim, Jun-Ho Boo, Kang-Il Cho, Yong-Sik Kwak, Gil-Cho Ahn
2021 — conf
A 0.9V 0.022mm
A-SSCC
Yong-Sik Kwak, Ho-Jin Kim, Kang-Il Cho, Jun-Ho Boo, Gil-Cho Ahn
2021 J jnl
A 96dB Dynamic Range 2kHz Bandwidth 2nd Order Delta-Sigma Modulator Using Modified Feed-Forward Architecture With Delayed Feedback.
IEEE Trans. Circuits Syst. II Express Briefs
Ju-Hye Han, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Jae Sang Kim, Gil-Cho Ahn
2021 J jnl
A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, -0.12% for Battery-Monitoring Applications.
IEEE J. Solid State Circuits
Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn
2020 — conf
A 10-b 900-MS/s Single-Channel Pipelined-SAR ADC Using Current-Mode Reference Scaling.
A-SSCC
Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Jun-Sang Park, Seung-Hoon Lee, Gil-Cho Ahn
2020 — conf
A 2.2mW 12-bit 200MS/s 28nm CMOS Pipelined SAR ADC with Dynamic Register-Based High-Speed SAR Logic.
A-SSCC
Jun-Sang Park, Je-Min Jeon, Jun-Ho Boo, Jae-Hyuk Lee, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn, Seung-Hoon Lee
2020 — conf
A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring Applications.
VLSI Circuits
Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn
2020 — conf
A Third-Order DT Delta-Sigma Modulator With Noise-Coupling Technique.
ISOCC
Tae-Gwan Kim, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn
2019 — conf
A 10-b 320-MS/s Dual-Residue Pipelined SAR ADC with Binary Search Current Interpolator.
CICC
Kang-Il Cho, Yong-Sik Kwak, Ho-Jin Kim, Jun-Ho Boo, Seung-Hoon Lee, Gil-Cho Ahn
2019 — conf
A 101 dB Dynamic Range Delta-Sigma Modulator Using Modified Feed-Forward Architecture for Audio Application.
ISOCC
Jun-Young Kil, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn
2018 J jnl
A 101 dB dynamic range, 2 kHz bandwidth delta-sigma modulator with a modified feed-forward architecture.
IEICE Electron. Express
Kang-Il Cho, Yong-Sik Kwak, Ho-Jin Kim, Gil-Cho Ahn
2018 J jnl
A 72.9-dB SNDR 20-MHz BW 2-2 Discrete-Time Resolution-Enhanced Sturdy MASH Delta-Sigma Modulator Using Source-Follower-Based Integrators.
IEEE J. Solid State Circuits
Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn
2017 J jnl
A 1.8 V 89.2 dB dynamic range delta-sigma modulator using an op-amp dynamic current biasing technique.
IEICE Electron. Express
Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn
2017 — conf
A 72.9-dB SNDR 20-MHz BW 2-2 discrete-time sturdy MASH delta-sigma modulator using source-follower-based integrators.
A-SSCC
Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn
2017 — conf
Analog front-end for EMG acquisition system.
ISOCC
Bum-Sik Chung, Hyeong-Kyu Kim, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn
2012 — conf
A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer.
ICECS
Youngmin Park, Tae-In Kwon, Kang-Il Cho, Yong-Sik Kwak, Gil-Cho Ahn, Chang-Seob Shin, Myung-Jin Lee, Seung-Bin You, Ho-Jin Park
2012 — conf
A digitally enhanced low-distortion delta-sigma modulator for wideband application.
ISOCC
Jae-Hyeon Shin, Kang-Il Cho, Gil-Cho Ahn
2011 C conf
A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADC.
ISCAS
Chang-Seob Shin, Min-Ho Yoon, Kang-Il Cho, Young-Ju Kim, Kwang-Soo Kim, Seung-Hoon Lee, Gil-Cho Ahn