Kanak Agarwal - RankMe

64 papers A* 13A 9C 4Journal 12Unranked 26

Year	Rank	Type	Title / Venue / Authors
2020	—	`conf`	SMARTER: Experiences with Cloud Native on the Edge. HotEdge Alexandre Ferreira, Eric Van Hensbergen, Chris Adeniyi-Jones, Edmund Grimley-Evans, Josh Minor, Mark Nutter, Luis E. Peña, Kanak Agarwal, Jon Hermes
2016	A*	`conf`	AC/DC TCP: Virtual Congestion Control Enforcement for Datacenter Networks. SIGCOMM Keqiang He, Eric Rozner, Kanak Agarwal, Yu (Jason) Gu, Wes Felter, John B. Carter, Aditya Akella
2016	J	`jnl`	IBM Bluemix Mobile Cloud Services. IBM J. Res. Dev. Ahmed Gheith, Ramakrishnan Rajamony, Patrick J. Bohrer, Kanak Agarwal, Michael Kistler, B. L. White Eagle, C. A. Hambridge, John B. Carter, T. Kaplinger
2015	A*	`conf`	Presto: Edge-based Load Balancing for Fast Datacenter Networks. SIGCOMM Keqiang He, Eric Rozner, Kanak Agarwal, Wes Felter, John B. Carter, Aditya Akella
2015	—	`conf`	TSV/FET proximity study using dense addressable transistor arrays. IRPS Raphael Robertazzi, Kanak Agarwal, Bucknell Webb, Christy Tyberg
2014	—	`conf`	Low-latency Network Monitoring via Oversubscribed Port Mirroring. ONS Jeff Rasley, Brent E. Stephens, Colin Dixon, Eric Rozner, Wes Felter, Kanak Agarwal, John B. Carter, Rodrigo Fonseca
2014	A*	`conf`	Planck: millisecond-scale monitoring and control for commodity networks. SIGCOMM Jeff Rasley, Brent E. Stephens, Colin Dixon, Eric Rozner, Wes Felter, Kanak Agarwal, John B. Carter, Rodrigo Fonseca
2014	—	`conf`	SDN traceroute: tracing SDN forwarding without changing network behavior. HotSDN Kanak Agarwal, Eric Rozner, Colin Dixon, John B. Carter
2014	—	`conf`	Shadow MACs: scalable label-switching for commodity ethernet. HotSDN Kanak Agarwal, Colin Dixon, Eric Rozner, John B. Carter
2014	A	`conf`	Wire-Speed Differential SOAP Encoding. ICWS Kanak Agarwal
2013	—	`conf`	A high-speed and large-scale dictionary matching engine for Information Extraction systems. ASAP Kanak Agarwal, Raphael Polig
2012	—	`conf`	Design-patterning co-optimization of SRAM robustness for double patterning lithography. ASP-DAC Vivek Joshi, Kanak Agarwal, Dennis Sylvester
2011	A	`conf`	Accelerated statistical simulation via on-demand Hermite spline interpolations. ICCAD Rouwaida Kanj, Tong Li, Rajiv V. Joshi, Kanak Agarwal, Ali Sadigh, David Winston, Sani R. Nassif
2011	A*	`conf`	Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect. DAC Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhruva Acharyya, Kanak Agarwal
2011	—	`conf`	Measuring within-die spatial variation profile through power supply current measurements. ISQED Jim Plusquellic, Dhruva Acharyya, Kanak Agarwal
2011	A	`conf`	REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variations. ICCAD Charles Lamech, Jim Aarestad, Jim Plusquellic, Reza M. Rad, Kanak Agarwal
2010	A	`conf`	Active learning framework for post-silicon variation extraction and test cost reduction. ICCAD Cheng Zhuo, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2010	A	`conf`	Analysis and optimization of SRAM robustness for double patterning lithography. ICCAD Vivek Joshi, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2010	—	`conf`	Analyzing electrical effects of RTA-driven local anneal temperature variation. ASP-DAC Vivek Joshi, Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2010	A*	`conf`	Closed-form modeling of layout-dependent mechanical stress. DAC Vivek Joshi, Valeriy Sukharev, Andres Torres, Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2010	J	`jnl`	Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk Noise. IEEE Trans. Very Large Scale Integr. Syst. Harmander Singh, Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown
2010	A*	`conf`	Frequency domain decomposition of layouts for double dipole lithography. DAC Kanak Agarwal
2010	A	`conf`	Leveraging existing power control circuits and power delivery architecture for variability measurement. ITC Dhruva Acharyya, Kanak Agarwal, Jim Plusquellic
2010	J	`jnl`	Mechanical Stress Aware Optimization for Leakage Power Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal
2010	—	`conf`	On-die sensors for measuring process and environmental variations in integrated circuits. ACM Great Lakes Symposium on VLSI Kanak Agarwal
2010	—	`conf`	Simultaneous extraction of effective gate length and low-field mobility in non-uniform devices. ISQED Vivek Joshi, Kanak Agarwal, Dennis Sylvester
2009	A	`conf`	Characterizing within-die variation from multiple supply port IDDQ measurements. ICCAD Kanak Agarwal, Dhruva Acharyya, Jim Plusquellic
2009	—	`conf`	The impact of BEOL lithography effects on the SRAM cell performance and yield. ISQED Nancy Ying Zhou, Rouwaida Kanj, Kanak Agarwal, Zhuo Li, Rajiv V. Joshi, Sani R. Nassif, Weiping Shi
2008	—	`conf`	A Design Model for Random Process Variability. ISQED Victoria Wang, Kanak Agarwal, Sani R. Nassif, Kevin J. Nowka, Dejan Markovic
2008	—	`conf`	Characterization and design for variability and reliability. CICC Kevin J. Nowka, Sani R. Nassif, Kanak Agarwal
2008	A*	`conf`	Leakage power reduction using stress-enhanced layouts. DAC Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal
2008	—	`conf`	Stress aware layout optimization. ISPD Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal
2008	J	`jnl`	The Impact of Random Device Variation on SRAM Cell Stability in Sub-90-nm CMOS Technologies. IEEE Trans. Very Large Scale Integr. Syst. Kanak Agarwal, Sani R. Nassif
2008	J	`jnl`	Variability in nanometer CMOS: Impact, analysis, and minimization. Integr. Dennis Sylvester, Kanak Agarwal, Saumil Shah
2007	A*	`conf`	Characterizing Process Variation in Nanometer CMOS. DAC Kanak Agarwal, Sani R. Nassif
2007	—	`conf`	Dynamic Power Management by Combination of Dual Static Supply Voltages. ISQED Kanak Agarwal, Kevin J. Nowka
2007	A	`conf`	Efficient computation of current flow in signal wires for reliability analysis. ICCAD Kanak Agarwal, Frank Liu
2007	J	`jnl`	Enhanced Leakage Reduction Techniques Using Intermediate Strength Power Gating. IEEE Trans. Very Large Scale Integr. Syst. Harmander Singh, Kanak Agarwal, Dennis Sylvester, Kevin J. Nowka
2007	J	`jnl`	Parametric Yield Analysis and Optimization in Leakage Dominated Technologies. IEEE Trans. Very Large Scale Integr. Syst. Kanak Agarwal, Rahul M. Rao, Dennis Sylvester, Richard B. Brown
2007	—	`conf`	Rigorous extraction of process variations for 65nm CMOS design. ESSCIRC Wei Zhao, Yu Cao, Frank Liu, Kanak Agarwal, Dhruva Acharyya, Sani R. Nassif, Kevin J. Nowka
2006	C	`conf`	Characterization of total chip leakage using inverse (reciprocal) gamma distribution. ISCAS Emrah Acar, Kanak Agarwal, Sani R. Nassif
2006	C	`conf`	Methods for estimating decoupling capacitance of nonswitching circuit blocks. ISCAS Sani R. Nassif, Kanak Agarwal, Emrah Acar
2006	J	`jnl`	Modeling and analysis of crosstalk noise in coupled RLC interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2006	—	`conf`	Power Gating with Multiple Sleep Modes. ISQED Kanak Agarwal, Kevin J. Nowka, Harmander Deogun, Dennis Sylvester
2006	A*	`conf`	Statistical analysis of SRAM cell stability. DAC Kanak Agarwal, Sani R. Nassif
2006	J	`jnl`	Statistical interconnect metrics for physical-design optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kanak Agarwal, Mridul Agarwal, Dennis Sylvester, David T. Blaauw
2005	A*	`conf`	Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance. DAC Ashish Srivastava, Saumil Shah, Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Stephen W. Director
2005	—	`conf`	Achieving continuous V ASP-DAC Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Anirudh Devgan
2005	—	`conf`	Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown
2005	—	`conf`	Power-aware global signaling strategies. ISCAS (1) Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Himanshu Kaul, Richard B. Brown, Sani R. Nassif
2005	—	`conf`	Statistical modeling of cross-coupling effects in VLSI interconnects. ASP-DAC Mridul Agarwal, Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2004	C	`conf`	A New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters. ICCD Saumil Shah, Kanak Agarwal, Dennis Sylvester
2004	J	`jnl`	A library compatible driver output model for on-chip RLC transmission lines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2004	J	`jnl`	A simple metric for slew rate of RC circuits based on two circuit moments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2004	—	`conf`	A simplified transmission-line based crosstalk noise model for on-chip RLC wiring. ASP-DAC Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2004	A	`conf`	Approaches to run-time and standby mode leakage reduction in global buses. ISLPED Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif
2004	A*	`conf`	Variational delay metrics for interconnect timing analysis. DAC Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula
2003	A*	`conf`	An effective capacitance based driver output model for on-chip RLC interconnects. DAC Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2003	J	`jnl`	Bidirectional closed-form transformation between on-chip coupling noise waveforms and interconnect delay-change curves. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Takashi Sato, Yu Cao, Kanak Agarwal, Dennis Sylvester, Chenming Hu
2003	—	`conf`	Dynamic clamping: on-chip dynamic shielding and termination for high-speed RLC buses. SoC Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2003	C	`conf`	Optimal Inductance for On-chip RLC Interconnections. ICCD Shidhartha Das, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2003	A*	`conf`	Simple metrics for slew rate of RC circuits based on two circuit moments. DAC Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2002	—	`conf`	A library compatible driving point model for on-chip RLC interconnects. Timing Issues in the Specification and Synthesis of Digital Systems Kanak Agarwal, Dennis Sylvester, David T. Blaauw
2002	—	`conf`	Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis. ASP-DAC/VLSI Design Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylvester, Chenming Hu