Kamran Zarrineh

18 papers A 7C 2Misc 2Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2011 A conf
Feedback based droop mitigation.
DATE
Salvatore Pontarelli, Marco Ottavi, Adelio Salsano, Kamran Zarrineh
2008 — conf
Design for Test Challenges of High Performance/Low Power Microprocessors.
DFT
Kamran Zarrineh
2005 A conf
Design and analysis of multiple weight linear compactors of responses containing unknown values.
ITC
Thomas Clouqueur, Kamran Zarrineh, Kewal K. Saluja, Hideo Fujiwara
2003 A conf
The P1500 DFT Disclosure Document: A Standard to Communicate Mergeable Core DFT Data.
ITC
Michael G. Wahl, Sudipta Bhawmik, Kamran Zarrineh, Pradipta Ghosh, Scott Davidson, Peter Harrod
2001 C conf
Automatic Generation and Validation of Memory Test Models for High Performance Microprocessors.
ICCD
Kamran Zarrineh, Thomas A. Ziaja, Amitava Majumdar
2001 J jnl
Automatic generation and compaction of March tests for memory arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty
2001 — conf
Defect Analysis and a New Fault Model for Multi-port SRAMs.
DFT
Pradeep Nagaraj, Shambhu Upadhaya, Kamran Zarrineh, R. Dean Adams
2001 J jnl
System-on-Chip Testability Using LSSD Scan Structures.
IEEE Des. Test Comput.
Kamran Zarrineh, Shambhu J. Upadhyaya, Vivek Chickermane
2000 — conf
Defect Analysis and Realistic Fault Model Extensions for Static Random Access Memories.
MTDT
Kamran Zarrineh, R. Dean Adams, Aneesha P. Deo
2000 A conf
Self test architecture for testing complex memory structures.
ITC
Kamran Zarrineh, R. Dean Adams, Thomas J. Eckenrode, Steven P. Gregor
1999 Misc conf
A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units.
VTS
Kamran Zarrineh, Shambhu J. Upadhyaya
1999 — conf
A design for test perspective on memory synthesis.
ISCAS (1)
Kamran Zarrineh, Shambhu J. Upadhyaya
1999 A conf
On Programmable Memory Built-In Self Test Architectures.
DATE
Kamran Zarrineh, Shambhu J. Upadhyaya
1999 — conf
Programmable Memory BIST and a New Synthesis Framework.
FTCS
Kamran Zarrineh, Shambhu J. Upadhyaya
1998 A conf
A new framework for generating optimal March tests for memory arrays.
ITC
Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty
1998 Misc conf
Automatic Insertion of Scan Structures to Enhance Testability of Embedded Memories, Cores and Chips.
VTS
Kamran Zarrineh, Shambhu J. Upadhyaya, Philip Shephard III
1997 A conf
Addressing Early Design-For-Test Synthesis in a Production Environment.
ITC
Vivek Chickermane, Kamran Zarrineh
1996 C conf
A Design For Test Perspective on I/O Management.
ICCD
Kamran Zarrineh, Vivek Chickermane, Gareth Nicholls, Mike Palmer