Kamalika Datta

90 papers A 6C 16Misc 8Journal 28Unranked 32

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Formally Verifying Multiply-and-Accumulate Architectures Using Symbolic Computer Algebra. SN Comput. Sci. Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2025	C	`conf`	A Comprehensive Synthesis and Verification Approach for RRAM-Based Neuromorphic Computing. DSD Fatemeh Shirinzadeh, Abhoy Kole, Kamalika Datta, Saeideh Shirinzadeh, Rolf Drechsler
2025	—	`conf`	Fast and Scalable MAGIC-Based Wallace Tree Multiplier for In-Memory Computing. CCMCC Saeideh Nabipour, Kamalika Datta, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler
2025	C	`conf`	ForMAt: Formal Verification of Scalable Multiply and Accumulate Units. FDL Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2025	A	`conf`	Late Breaking Results: Towards Efficient Formal Verification of Dot Product Architectures. DATE Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2025	—	`conf`	Multi-Input MAGIC Synthesis and Verification for In-Memory Computing Design. ISMVL Saeideh Nabipour, Kamalika Datta, Lennart Weingarten, Abhoy Kole, Rolf Drechsler
2025	C	`conf`	Towards an Automated Debugging Approach for Fault Identification in Quantum Circuits. DDECS Anton Maidl, Abhoy Kole, Kamalika Datta, Jannis Stoppe, Rolf Drechsler
2025	—	`conf`	Unlocking the Benefits of Dynamic Quantum Circuits in Resource Constraint Architecture. ISVLSI Abhoy Kole, Mohammed E. Djeridane, Arighna Deb, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
2025	J	`jnl`	qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking. ACM J. Emerg. Technol. Comput. Syst. Abhoy Kole, Mohammed E. Djeridane, Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2024	J	`jnl`	A new design of parity-preserving reversible multipliers based on multiple-control toffoli synthesis targeting emerging quantum circuits. Frontiers Comput. Sci. Mojtaba Noorallahzadeh, Mohammad Mosleh, Kamalika Datta
2024	A	`conf`	Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. DATE Lennart Weingarten, Kamalika Datta, Abhoy Kole, Rolf Drechsler
2024	—	`conf`	Design Automation Challenges and Benefits of Dynamic Quantum Circuit in Present NISQ Era and Beyond: (Invited Paper). ISVLSI Abhoy Kole, Kamalika Datta, Rolf Drechsler
2024	A	`conf`	Dynamic Realization of Multiple Control Toffoli Gate. DATE Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler
2024	J	`jnl`	Exploiting the Extended Neighborhood of Hexagonal Qubit Architecture for Mapping Quantum Circuits. ACM J. Emerg. Technol. Comput. Syst. Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
2024	—	`conf`	Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. ACM Great Lakes Symposium on VLSI Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler
2024	—	`conf`	Exploring the Potential of Dynamic Quantum Circuit for Improving Device Scalability. SOCC Abhoy Kole, Kamalika Datta, Rolf Drechsler
2024	—	`conf`	Improving Self-Fault-Tolerance Capability of Memristor Crossbar Using a Weight-Sharing Approach. ATS Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, F. Lalchhandama, Kamalika Datta, Rolf Drechsler, Indranil Sengupta
2024	Misc	`conf`	In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. VLSID Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler
2024	C	`conf`	Is Simulation the only Alternative for Effective Verification of Dynamic Quantum Circuits? RC Liam Hurwitz, Kamalika Datta, Abhoy Kole, Rolf Drechsler
2024	J	`jnl`	ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars. ACM Trans. Embed. Comput. Syst. Kousik Bhunia, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
2024	—	`conf`	Towards Formal Verification for MAC-based In-Memory Computing. ATS Fatemeh Shirinzadeh, Kamalika Datta, Saeideh Shirinzadeh, Abhoy Kole, Rolf Drechsler
2024	—	`conf`	Towards Polynomial Formal Verification of Neuromorphic Architectures. ISED Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2024	J	`jnl`	qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking. CoRR Abhoy Kole, Mohammed E. Djeridane, Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2023	—	`conf`	Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars. ASP-DAC Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
2023	C	`conf`	Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. RC Abhoy Kole, Kamalika Datta, Philipp Niemann, Indranil Sengupta, Rolf Drechsler
2023	A	`conf`	Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network. DATE Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler
2023	J	`jnl`	Impact of sneak paths on in-memory logic design in memristive crossbars. it Inf. Technol. Kamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler
2023	C	`conf`	Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. RC Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
2023	—	`conf`	Memristors: Device Modeling, Design and Verification. iSES Kamalika Datta, Rolf Drechsler
2023	—	`conf`	PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor. NANOARCH Lennart Weingarten, Kamalika Datta, Rolf Drechsler
2023	—	`conf`	Verification of In-Memory Logic Design using ReRAM Crossbars. NEWCAS Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler
2022	J	`jnl`	CoMIC: Complementary Memristor based in-memory computing in 3D architecture. J. Syst. Archit. F. Lalchhandama, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
2022	J	`jnl`	FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications. J. Electron. Test. Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
2022	J	`jnl`	Feed-Forward learning algorithm for resistive memories. J. Syst. Archit. Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
2022	J	`jnl`	In-Memory Computing on Resistive RAM Systems Using Majority Operation. J. Circuits Syst. Comput. F. Lalchhandama, Mukesh Sahani, Vompolu Mohan Srinivas, Indranil Sengupta, Kamalika Datta
2022	—	`conf`	Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. GI-Jahrestagung Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
2022	—	`conf`	Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. ISMVL Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
2022	C	`conf`	SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. DSD Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
2022	C	`conf`	Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications. VLSI-SoC Kamalika Datta, Saman Fröhlich, Saeideh Shirinzadeh, Dev Narayan Yadav, Indranil Sengupta, Rolf Drechsler
2022	C	`conf`	Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles. DSD Kamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta, Rolf Drechsler
2020	J	`jnl`	An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). Integr. Phrangboklang Lyngton Thangkhiew, Alwin Zulehner, Robert Wille, Kamalika Datta, Indranil Sengupta
2020	A	`conf`	Fledge: Flexible Edge Platforms Enabled by In-memory Computing. DATE Kamalika Datta, Arko Dutt, Ahmed Zaky, Umesh Chand, Devendra Singh, Yida Li, Jackson Chun-Yang Huang, Aaron Thean, Mohamed M. Sabry Aly
2020	J	`jnl`	Improved Mapping of Quantum Circuits to IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Abhoy Kole, Stefan Hillmich, Kamalika Datta, Robert Wille, Indranil Sengupta
2020	J	`jnl`	Improved Ternary Reversible Logic Synthesis Using Group Theoretic Approach. J. Circuits Syst. Comput. P. Mercy Nesa Rani, Kamalika Datta
2020	A	`conf`	Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM. DATE Abdallah M. Felfel, Kamalika Datta, Arko Dutt, Hasita Veluri, Ahmed Zaky, Aaron Voon-Yew Thean, Mohamed M. Sabry Aly
2019	—	`conf`	A staircase structure for scalable and efficient synthesis of memristor-aided logic. ASP-DAC Alwin Zulehner, Kamalika Datta, Indranil Sengupta, Robert Wille
2019	Misc	`conf`	Design and Implementation of Threshold Logic Functions Using Memristors. VLSID Yaswanth Krishna Yadav Danaboina, Pravanjan Samanta, Kamalika Datta, Indrajit Chakrabarti, Indranil Sengupta
2019	J	`jnl`	Efficient Design of Quantum Circuits Using Nearest Neighbor Constraint in 3D Architecture. J. Circuits Syst. Comput. Leniency Marbaniang, Kamalika Datta
2019	Misc	`conf`	Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. VLSID Tathagato Bose, Kamalika Datta, Indranil Sengupta
2019	J	`jnl`	Look-ahead mapping of Boolean functions in memristive crossbar array. Integr. Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta
2019	Misc	`conf`	Mapping of Boolean Logic Functions onto 3D Memristor Crossbar. VLSID Naveen Murali G, Peddireddi Satya Vardhan, F. Lalchhandama, Kamalika Datta, Indranil Sengupta
2018	J	`jnl`	A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Abhoy Kole, Kamalika Datta, Indranil Sengupta
2018	J	`jnl`	A Scalable In-Memory Logic Synthesis Approach Using Memristor Crossbar. IEEE Trans. Very Large Scale Integr. Syst. Rahul Gharpinde, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Indranil Sengupta
2018	J	`jnl`	Efficient Mapping of Boolean Functions to Memristor Crossbar Using MAGIC NOR Gates. IEEE Trans. Circuits Syst. I Regul. Pap. Phrangboklang Lyngton Thangkhiew, Rahul Gharpinde, Kamalika Datta
2018	—	`conf`	Fast In-Memory Computation of Boolean Functions in Memristive Crossbar Array. ISED Phrangboklang Lyngton Thangkhiew, Kamalika Datta
2018	—	`conf`	Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. ISMVL Alwin Zulehner, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Robert Wille
2018	—	`conf`	Logic Design Using Memristors: An Emerging Technology. ISMVL Saeideh Shirinzadeh, Kamalika Datta, Rolf Drechsler
2018	—	`conf`	Modelling and Simulation of Non-Ideal MAGIC NOR Gates on Memristor Crossbar. ISED Naveen Murali G, F. Lalchhandama, Kamalika Datta, Indranil Sengupta
2018	J	`jnl`	Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing. J. Syst. Archit. Phrangboklang Lyngton Thangkhiew, Kamalika Datta
2017	C	`conf`	Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. RC Leniency Marbaniang, Abhoy Kole, Kamalika Datta, Indranil Sengupta
2017	J	`jnl`	Exact Synthesis of Reversible Logic Circuits using Model Checking. CoRR Rajarshi Ray, Arup Deka, Kamalika Datta
2017	—	`conf`	Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. ISMVL Abhoy Kole, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
2017	C	`conf`	Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. RC P. Mercy Nesa Rani, Abhoy Kole, Kamalika Datta, Indranil Sengupta
2017	Misc	`conf`	Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. VLSID Abhoy Kole, Kamalika Datta
2017	C	`conf`	Test Pattern Generation Effort Evaluation of Reversible Circuits. RC Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta
2016	J	`jnl`	A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. IEEE J. Emerg. Sel. Topics Circuits Syst. Abhoy Kole, Kamalika Datta, Indranil Sengupta
2016	—	`conf`	An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates. ISVLSI F. Lalchhandama, Brojo Gopal Sapui, Kamalika Datta
2016	—	`conf`	An improved gate library for logic synthesis of optical circuits. ISED Shuchishman Burman, Kamalika Datta, Robert Wille, Indranil Sengupta, Rolf Drechsler
2016	—	`conf`	Area efficient implementation of ripple carry adder using memristor crossbar arrays. IDT Phrangboklang Lyngton Thangkhiew, Rahul Gharpinde, Varun Chowdhary Paturi, Kamalika Datta, Indranil Sengupta
2016	—	`conf`	Parameter sensing and object tracking using global positioning system. ISED Arghya P. Saikia Thengal, Naman Rastogi, Abhilash Medhi, Ritu Ranjan Shrivastwa, Kamalika Datta
2015	J	`jnl`	A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines. IEEE Trans. Computers Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
2015	J	`jnl`	All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer. Microelectron. J. Kamalika Datta, Tanay Chattopadhyay, Indranil Sengupta
2015	Misc	`conf`	BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. VLSID Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2015	—	`conf`	Fast Qubit Placement in 2D Architecture Using Nearest Neighbor Realization. iNIS Ritu Ranjan Shrivastwa, Kamalika Datta, Indranil Sengupta
2015	C	`conf`	Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. RC Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille
2014	Misc	`conf`	All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer. VLSID Kamalika Datta, Indranil Sengupta
2014	J	`jnl`	An Approach to Reversible Logic Synthesis Using Input and Output Permutations. Trans. Comput. Sci. Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2014	—	`conf`	An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing. ACSS (2) Kamalika Datta, Alhaad Gokhale, Indranil Sengupta, Hafizur Rahaman
2014	J	`jnl`	An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes. ACM J. Emerg. Technol. Comput. Syst. Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman
2014	—	`conf`	BDD based synthesis of Boolean functions using memristors. IDT Sayak Chakraborti, Paturi Varun Chowdhary, Kamalika Datta, Indranil Sengupta
2014	C	`conf`	Optimizing DD-based synthesis of reversible circuits using negative control lines. DDECS Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2014	C	`conf`	RevVis: Visualization of Structures and Properties in Reversible Circuits. RC Robert Wille, Jannis Stoppe, Eleonora Schönborn, Kamalika Datta, Rolf Drechsler
2013	—	`conf`	An evolutionary approach to reversible logic synthesis using output permutation. IDT Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2013	—	`conf`	ESOP-Based Synthesis of Reversible Circuit Using Improved Cube List. ISED Chandan Bandyopadhyay, Debashri Roy, Dipak Kumar Kole, Kamalika Datta, Hafizur Rahaman
2013	C	`conf`	Exploiting Negative Control Lines in the Optimization of Reversible Circuits. RC Kamalika Datta, Gaurav Rathi, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2013	J	`jnl`	Partial encryption and watermarking scheme for audio files with controlled degradation of quality. Multim. Tools Appl. Kamalika Datta, Indranil Sengupta
2013	J	`jnl`	Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates. J. Low Power Electron. Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
2013	—	`conf`	Reversible logic implementation of AES algorithm. DTIS Kamalika Datta, Vishal Shrivastav, Indranil Sengupta, Hafizur Rahaman
2012	—	`conf`	Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic. ISED Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
2012	Misc	`conf`	Synthesis of Reversible Circuits Using Heuristic Search Method. VLSI Design Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman