Kaijie Wu - RankMe

84 papers A* 4A 17B 3C 4Misc 2Journal 43Unranked 11

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Toward Building and Optimizing Trustworthy Systems Using Untrusted Components: A Graph-Theoretic Perspective. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaotong Cui, Xing Zhang, Hao Yan, Liang Zhang, Kefei Cheng, Yu Wu, Kaijie Wu
2020	J	`jnl`	On the Difficulty of Inserting Trojans in Reversible Computing Architectures. IEEE Trans. Emerg. Top. Comput. Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Kaijie Wu, Rolf Drechsler, Ramesh Karri
2019	J	`jnl`	Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory. IEEE Trans. Computers Yejia Di, Liang Shi, Congming Gao, Qiao Li, Chun Jason Xue, Kaijie Wu
2019	J	`jnl`	Split Manufacturing-Based Register Transfer-Level Obfuscation. ACM J. Emerg. Technol. Comput. Syst. Xiaotong Cui, Jeff Jun Zhang, Kaijie Wu, Siddharth Garg, Ramesh Karri
2019	J	`jnl`	TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Christian Pilato, Kaijie Wu, Siddharth Garg, Ramesh Karri, Francesco Regazzoni
2018	J	`jnl`	Exploiting Chip Idleness for Minimizing Garbage Collection - Induced Chip Access Conflict on SSDs. ACM Trans. Design Autom. Electr. Syst. Congming Gao, Liang Shi, Yejia Di, Qiao Li, Chun Jason Xue, Kaijie Wu, Edwin Hsing-Mean Sha
2018	J	`jnl`	Exploiting Parallelism for Access Conflict Minimization in Flash-Based Solid State Drives. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Congming Gao, Liang Shi, Cheng Ji, Yejia Di, Kaijie Wu, Chun Jason Xue, Edwin Hsing-Mean Sha
2018	J	`jnl`	Hardware Trojan Detection Using the Order of Path Delay. ACM J. Emerg. Technol. Comput. Syst. Xiaotong Cui, Elnaz Koopahi, Kaijie Wu, Ramesh Karri
2018	B	`conf`	Hardware Trojan detection using path delay order encoding with process variation tolerance. ETS Xiaotong Cui, Kaijie Wu, Ramesh Karri
2018	A	`conf`	IC/IP piracy assessment of reversible logic. ICCAD Samah Mohamed Saeed, Xiaotong Cui, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri
2018	—	`conf`	Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost ECC Enabled Consumer-Level Flash Memory. ACM Great Lakes Symposium on VLSI Yejia Di, Liang Shi, Congming Gao, Qiao Li, Kaijie Wu, Chun Jason Xue
2018	J	`jnl`	Potential Trigger Detection for Hardware Trojans. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Minhui Zou, Xiaotong Cui, Liang Shi, Kaijie Wu
2018	J	`jnl`	Securing Hardware Accelerators: A New Challenge for High-Level Synthesis. IEEE Embed. Syst. Lett. Christian Pilato, Siddharth Garg, Kaijie Wu, Ramesh Karri, Francesco Regazzoni
2017	Misc	`conf`	A PV aware data placement scheme for read performance improvement on LDPC based flash memory: work-in-progress. CODES+ISSS Qiao Li, Liang Shi, Yejia Di, Yajuan Du, Kaijie Wu, Chun Jason Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2017	J	`jnl`	Asymmetric Error Rates of Cell States Exploration for Performance Improvement on Flash Memory Based Storage Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Edwin Hsing-Mean Sha, Congming Gao, Liang Shi, Kaijie Wu, Mengying Zhao, Chun Jason Xue
2017	J	`jnl`	On the Difficulty of Inserting Trojans in Reversible Computing Architectures. CoRR Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri
2017	J	`jnl`	Towards Reverse Engineering Reversible Logic. CoRR Samah Mohamed Saeed, Xiaotong Cui, Robert Wille, Alwin Zulehner, Kaijie Wu, Rolf Drechsler, Ramesh Karri
2017	J	`jnl`	Towards trustworthy storage using SSDs with proprietary FTL. Microprocess. Microsystems Xiaotong Cui, Liang Shi, Kaijie Wu
2017	J	`jnl`	面向内存文件系统的数据一致性更新机制研究 (Research on Data Consistency for In-memory File Systems). 计算机科学 Zhilong Sun, Edwin H.-M. Sha, Qingfeng Zhuge, Xianzhang Chen, Kaijie Wu
2016	A	`conf`	Access Characteristic Guided Read and Write Cost Regulation for Performance Improvement on Flash Memory. FAST Qiao Li, Liang Shi, Chun Jason Xue, Kaijie Wu, Cheng Ji, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2016	—	`conf`	Can flexible, domain specific programmable logic prevent IP theft? DFT Xiaotong Cui, Kaijie Wu, Siddharth Garg, Ramesh Karri
2016	J	`jnl`	Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems. IEEE Trans. Very Large Scale Integr. Syst. Liang Shi, Yejia Di, Mengying Zhao, Chun Jason Xue, Kaijie Wu, Edwin Hsing-Mean Sha
2016	A	`conf`	Exploiting process variation for retention induced refresh minimization on flash memory. DATE Yejia Di, Liang Shi, Kaijie Wu, Chun Jason Xue
2016	J	`jnl`	Guest Editorial: Real-Time and Embedded Systems. J. Signal Process. Syst. Kaijie Wu, Zili Shao
2016	—	`conf`	Minimizing cell-to-cell interference by exploiting differential bit impact characteristics of scaled MLC NAND flash memories. NVMSA Yejia Di, Liang Shi, Congming Gao, Kaijie Wu, Chun Jason Xue, Edwin Hsing-Mean Sha
2016	J	`jnl`	Retention Trimming for Lifetime Improvement of Flash Memory Storage Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Liang Shi, Kaijie Wu, Mengying Zhao, Chun Jason Xue, Duo Liu, Edwin Hsing-Mean Sha
2016	J	`jnl`	Worst-Case Finish Time Analysis for DAG-Based Applications in the Presence of Transient Faults. J. Comput. Sci. Technol. Xiaotong Cui, Kaijie Wu, Tongquan Wei, Edwin Hsing-Mean Sha
2015	A	`conf`	Maximizing IO performance via conflict reduction for flash memory storage systems. DATE Qiao Li, Liang Shi, Congming Gao, Kaijie Wu, Chun Jason Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2015	—	`conf`	Realistic Task Parallelization of the H.264 Decoding Algorithm for Multiprocessors. HPCC/CSS/ICESS Xiaohao Lin, Weichen Liu, Chunming Xiao, Jie Dai, Xianlu Luo, Dan Zhang, Duo Liu, Kaijie Wu, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2015	J	`jnl`	Sharp Corner/Edge Recognition in Domestic Environments Using RGB-D Camera Systems. IEEE Trans. Circuits Syst. II Express Briefs Junlong Zhou, Jianming Yan, Tongquan Wei, Kaijie Wu, Xiaodao Chen, Shiyan Hu
2015	A	`conf`	Towards trustable storage using SSDs with proprietary FTL. DATE Xiaotong Cui, Minhui Zou, Liang Shi, Kaijie Wu
2015	—	`conf`	User Experience Enhanced Task Scheduling and Processor Frequency Scaling for Energy-Sensitive Mobile Devices. HPCC/CSS/ICESS Jie Dai, Weichen Liu, Xiaohao Lin, Yaoyao Ye, Chunming Xiao, Kaijie Wu, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2014	J	`jnl`	Efficient fault-tolerant scheduling on multiprocessor systems via replication and deallocation. Int. J. Embed. Syst. Jun Zhang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Juan Yi, Kaijie Wu
2014	—	`conf`	Efficient feasibility analysis of DAG scheduling with real-time constraints in the presence of faults. ASP-DAC Xiaotong Cui, Jun Zhang, Kaijie Wu, Edwin Hsing-Mean Sha
2014	B	`conf`	Energy efficient routing techniques with guaranteed reliability based on multi-level uncertain graph. RTCSA Wendi Nie, Yaoxin Duan, Kaijie Wu, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2014	J	`jnl`	Error Detection and Recovery for ECC: A New Approach Against Side-Channel Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kun Ma, Kaijie Wu
2014	C	`conf`	Exploit asymmetric error rates of cell states to improve the performance of flash memory storage systems. ICCD Congming Gao, Liang Shi, Kaijie Wu, Chun Jason Xue, Edwin Hsing-Mean Sha
2014	Misc	`conf`	Exploiting parallelism in I/O scheduling for access conflict minimization in flash-based solid state drives. MSST Congming Gao, Liang Shi, Mengying Zhao, Chun Jason Xue, Kaijie Wu, Edwin Hsing-Mean Sha
2014	J	`jnl`	Fault-Duration And-Location Aware CED Technique With Runtime Adaptability. IEEE Trans. Very Large Scale Integr. Syst. Yu Liu, Kaijie Wu
2014	A*	`conf`	High-Level Synthesis for Run-Time Hardware Trojan Detection and Recovery. DAC Xiaotong Cui, Kun Ma, Liang Shi, Kaijie Wu
2014	B	`conf`	Messages from the conference chairs. RTCSA Edwin Hsing-Mean Sha, Jörg Henkel, Kaijie Wu, Tarek F. Abdelzaher, Hojung Cha
2014	A*	`conf`	Retention Trimming for Wear Reduction of Flash Memory Storage Systems. DAC Liang Shi, Kaijie Wu, Mengying Zhao, Chun Jason Xue, Edwin Hsing-Mean Sha
2014	J	`jnl`	Scan-Based Attack on Stream Ciphers: A Case Study on eSTREAM Finalists. J. Comput. Sci. Technol. Minhui Zou, Kun Ma, Kaijie Wu, Edwin Hsing-Mean Sha
2013	—	`conf`	A method for construction of Nitinol antenna for implantable medical devices. BMEI Kaijie Wu, Shawn Patrick Casey, Lei Zhao, Xinyu Chai
2012	J	`jnl`	Homomorphic Property-Based Concurrent Error Detection of RSA: A Countermeasure to Fault Attack. IEEE Trans. Computers Kun Ma, Han Liang, Kaijie Wu
2012	J	`jnl`	Quasi-static fault-tolerant scheduling schemes for energy-efficient hard real-time systems. J. Syst. Softw. Tongquan Wei, Piyush Mishra, Kaijie Wu, Junlong Zhou
2011	A	`conf`	LOEDAR: A low cost error detection and recovery scheme for ECC. DATE Kun Ma, Kaijie Wu
2011	C	`conf`	Runtime adaptable concurrent error detection for linear digital systems. ICCD Yu Liu, Kaijie Wu
2011	J	`jnl`	Scan-based attacks on linear feedback shift register based stream ciphers. ACM Trans. Design Autom. Electr. Syst. Yu Liu, Kaijie Wu, Ramesh Karri
2010	A	`conf`	Scheduling for energy efficiency and fault tolerance in hard real-time systems. DATE Yu Liu, Han Liang, Kaijie Wu
2010	C	`conf`	Towards cool and reliable digital systems: RT level CED techniques with runtime adaptability. ICCD Yu Liu, Kaijie Wu
2009	—	`conf`	An ILP formulation to Unify Power Efficiency and Fault Detection at Register-Transfer Level. DFT Yu Liu, Kaijie Wu
2009	J	`jnl`	Scan-based Attacks on Linear Feedback Shift Register Based Stream Ciphers. IACR Cryptol. ePrint Arch. Yu Liu, Kaijie Wu, Ramesh Karri
2008	J	`jnl`	Fixed-Priority Allocation and Scheduling for Energy-Efficient Fault Tolerance in Hard Real-Time Multiprocessor Systems. IEEE Trans. Parallel Distributed Syst. Tongquan Wei, Piyush Mishra, Kaijie Wu, Han Liang
2007	J	`jnl`	Error Correction On-Demand: A Low Power Register Transfer Level Concurrent Error Correction Technique. IEEE Trans. Computers Han Liang, Piyush Mishra, Kaijie Wu
2007	C	`conf`	Register Transfer Level Concurrent Error Detection in Elliptic Curve Crypto Implementations. FDTC Richard Stern, Nikhil Joshi, Kaijie Wu, Ramesh Karri
2007	J	`jnl`	The Robust QCA Adder Designs Using Composable QCA Building Blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kyosun Kim, Kaijie Wu, Ramesh Karri
2006	J	`jnl`	Algorithm-level recomputing with shifted operands-a register transfer level concurrent error detection technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kaijie Wu, Ramesh Karri
2006	J	`jnl`	Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nikhil Joshi, Kaijie Wu, Jayachandran Sundararajan, Ramesh Karri
2006	A	`conf`	Online task-scheduling for fault-tolerant low-energy real-time systems. ICCAD Tongquan Wei, Piyush Mishra, Kaijie Wu, Han Liang
2006	J	`jnl`	Quantum-Dot Cellular Automata Design Guideline. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kyosun Kim, Kaijie Wu, Ramesh Karri
2006	J	`jnl`	Secure Scan: A Design-for-Test Architecture for Crypto Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bo Yang, Kaijie Wu, Ramesh Karri
2006	J	`jnl`	Tamper Proofing by Design Using Generalized Involution-Based Concurrent Error Detection for Involutional Substitution Permutation and Feistel Networks. IEEE Trans. Computers Nikhil Joshi, Jayachandran Sundararajan, Kaijie Wu, Bo Yang, Ramesh Karri
2005	—	`conf`	Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands. ASP-DAC Tongquan Wei, Kaijie Wu, Ramesh Karri, Alex Orailoglu
2005	A*	`conf`	Secure scan: a design-for-test architecture for crypto chips. DAC Bo Yang, Kaijie Wu, Ramesh Karri
2005	A	`conf`	Towards Designing Robust QCA Architectures in the Presence of Sneak Noise Paths. DATE Kyosun Kim, Kaijie Wu, Ramesh Karri
2004	A	`conf`	Concurrent Error Detection Schemes for Involution Ciphers. CHES Nikhil Joshi, Kaijie Wu, Ramesh Karri
2004	J	`jnl`	Fault secure datapath synthesis using hybrid time and hardware redundancy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kaijie Wu, Ramesh Karri
2004	A	`conf`	Low Cost Concurrent Error Detection for the Advanced Encryption Standard. ITC Kaijie Wu, Ramesh Karri, Grigori Kuznetsov, Michael Gössel
2004	J	`jnl`	Scan Based Side Channel Attack on Data Encryption Standard. IACR Cryptol. ePrint Arch. Bo Yang, Kaijie Wu, Ramesh Karri
2004	A	`conf`	Scan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard. ITC Bo Yang, Kaijie Wu, Ramesh Karri
2003	J	`jnl`	Concurrent error detection of fault-based side-channel cryptanalysis of 128-bit RC6 block cipher. Microelectron. J. Kaijie Wu, Piyush Mishra, Ramesh Karri
2003	A	`conf`	Register Transfer Level Approach to Hybrid Time and Hardware Redundancy Based Fault Secure Datapath Synthesis. ITC Kaijie Wu, Ramesh Karri
2003	J	`jnl`	Selectively breaking data dependences to improve the utilization of idle cycles in algorithm level re-computing data paths. IEEE Trans. Reliab. Kaijie Wu, Ramesh Karri
2002	J	`jnl`	Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique. IEEE Trans. Very Large Scale Integr. Syst. Ramesh Karri, Kaijie Wu
2002	J	`jnl`	Algorithm level recomputing using allocation diversity: a registertransfer level approach to time redundancy-based concurrent errordetection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kaijie Wu, Ramesh Karri
2002	J	`jnl`	Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim
2002	A	`conf`	Exploiting Idle Cycles for Algorithm Level Re-Computing. DATE Kaijie Wu, Ramesh Karri
2001	A	`conf`	Algorithm Level Re-Computing - A Register Transfer Level Concurrent Error Detection Technique. ICCAD Kaijie Wu, Ramesh Karri
2001	A	`conf`	Algorithm level recomputing with allocation diversity: a register transfer level time redundancy based concurrent error detection technique. ITC Kaijie Wu, Ramesh Karri
2001	A*	`conf`	Concurrent Error Detection of Fault-Based Side-Channel Cryptanalysis of 128-Bit Symmetric Block Ciphers. DAC Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim
2001	—	`conf`	Fault-Based Side-Channel Cryptanalysis Tolerant Rijndael Symmetric Block Cipher Architecture. DFT Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim
2001	—	`conf`	Idle Cycles Based Concurrent Error Detection of RC6 Encryption. DFT Kaijie Wu, Ramesh Karri
2000	A	`conf`	Algorithm level re-computing with shifted operands-a register transfer level concurrent error detection technique. ITC Ramesh Karri, Kaijie Wu