Kaijian Shi - RankMe

19 papers A* 2C 1Journal 2Unranked 10

Year	Rank	Type	Title / Venue / Authors
2014	—	`ed.`	27th IEEE International System-on-Chip Conference, SOCC 2014, Las Vegas, NV, USA, September 2-5, 2014 SoCC Kaijian Shi, Thomas Büchner, Danella Zhao, Ramalingam Sridhar
2014	—	`conf`	Message from conference general chair. SoCC Kaijian Shi
2013	—	`ed.`	2013 IEEE International SOC Conference, Erlangen, Germany, September 4-6, 2013 SoCC Norbert Schuhmann, Kaijian Shi, Nagi Naganathan
2013	—	`conf`	Message from program chairs. SoCC Kaijian Shi, Nagi Naganathan
2013	—	`conf`	Sleep transistor design in 28nm CMOS technology. SoCC Kaijian Shi
2012	J	`jnl`	Automation of Switch Insertion and Power Network Generation in 28 nm Power-Switched Designs. J. Low Power Electron. Shane Stelmach, Kaijian Shi, Anthony Hill
2012	—	`ed.`	IEEE 25th International SOC Conference, SOCC 2012, Niagara Falls, NY, USA, September 12-14, 2012 SoCC Ramalingam Sridhar, Norbert Schuhmann, Kaijian Shi
2011	—	`conf`	Well tapping methodologies in power-gating design. SoCC Kaijian Shi, David Tester
2010	—	`conf`	Low-power SOC implementation: What you need to know. SoCC Kaijian Shi
2008	C	`conf`	Area and power-delay efficient state retention pulse-triggered flip-flops with scan and reset capabilities. ICCD Kaijian Shi
2008	J	`jnl`	Simultaneous Sleep Transistor Insertion and Power Network Synthesis for Industrial Power Gating Designs. J. Comput. Kaijian Shi, Zhian Lin, Yi-Min Jiang, Lin Yuan
2007	—	`conf`	A Power Network Synthesis Method for Industrial Power Gating Designs. ISQED Kaijian Shi, Zhian Lin, Yi-Min Jiang
2007	—	`conf`	A wakeup rush current and charge-up time analysis method for programmable power-gating designs. SoCC Kaijian Shi, Jingsong Li
2007	—	`book`	Low Power Methodology Manual - for System-on-Chip Design. Michael Keating, David Flynn, Robert C. Aitken, Alan Gibbons, Kaijian Shi
2006	A*	`conf`	Challenges in sleep transistor design and implementation in low-power designs. DAC Kaijian Shi, David Howard
2005	—	`conf`	A Clock Isolation Method For Complex SoC Designs. SoCC Kaijian Shi, Hichem Belhadj
2005	—	`conf`	Virtual Hierarchical Design Representations for Distributed Optimization of Multi-Million Gate Designs. ASAP Thi Nguyen, Kaijian Shi
2005	—	`conf`	Virtual Hierarchical Design Representations for Distributed Optimization of Multi-Million Gate Designs. SoCC Thi Nguyen, Kaijian Shi
2003	A*	`conf`	Hybrid hierarchical timing closure methodology for a high performance and low power DSP. DAC Kaijian Shi, Graig Godwin