Kai Zhang - RankMe

16 papers A* 1C 2Journal 9Unranked 4

Year	Rank	Type	Title / Venue / Authors
2014	J	`jnl`	FT-Matrix: A Coordination-Aware Architecture for Signal Processing. IEEE Micro Shuming Chen, Yaohua Wang, Sheng Liu, Jianghua Wan, Haiyan Chen, Hengzhu Liu, Kai Zhang, Xiangyuan Liu, Xi Ning
2013	C	`conf`	A Fine-Grained Pipelined Implementation of LU Decomposition on SIMD Processors. NPC Kai Zhang, Shuming Chen, Wei Liu, Xi Ning
2013	A*	`conf`	A multiple SIMD, multiple data (MSMD) architecture: Parallel execution of dynamic and static SIMD fragments. HPCA Yaohua Wang, Shuming Chen, Jianghua Wan, Jiayuan Meng, Kai Zhang, Wei Liu, Xi Ning
2013	J	`jnl`	A novel QPP interleaver for parallel turbo decoder. IEICE Electron. Express Wei Liu, Shuming Chen, Hu Chen, Yaohua Wang, Sheng Liu, Kai Zhang, Xi Ning
2013	J	`jnl`	Breaking the performance bottleneck of sparse matrix-vector multiplication on SIMD processors. IEICE Electron. Express Kai Zhang, Shuming Chen, Yaohua Wang, Jianghua Wan
2013	J	`jnl`	Dual-Core Framework: Eliminating the Bottleneck Effect of Scalar Kernels on SIMD Architectures. IEICE Trans. Inf. Syst. Yaohua Wang, Shuming Chen, Hu Chen, Jianghua Wan, Kai Zhang, Sheng Liu
2013	C	`conf`	Redefining the relationship between scalar and parallel units in SIMD architectures. ISCAS Yaohua Wang, Shuming Chen, Jianghua Wan, Kai Zhang
2012	J	`jnl`	A cost conscious performance model for media processors. IEICE Electron. Express Yaohua Wang, Shuming Chen, Kai Zhang, Jianghua Wan, Hu Chen, Sheng Liu, Xi Ning
2012	—	`conf`	Architectural Implications for SIMD Processors in the Wireless Communication Domain. HPCC-ICESS Yaohua Wang, Kai Zhang, Jianghua Wan, Sheng Liu, Xi Ning, Shuming Chen
2012	—	`conf`	Architecture Design Trade-offs among VLIW SIMD and Multi-core Schemes. IPDPS Workshops Yaohua Wang, Shuming Chen, Kai Zhang, Hu Chen, Xiaowen Chen
2012	J	`jnl`	CMRF: a Configurable Matrix Register File for accelerating matrix operations on SIMD processors. IEICE Electron. Express Kai Zhang, Shuming Chen, Hu Chen, Yaohua Wang, Xiaowen Chen, Sheng Liu, Wei Liu
2012	J	`jnl`	Instruction Shuffle: Achieving MIMD-like Performance on SIMD Architectures. IEEE Comput. Archit. Lett. Yaohua Wang, Shuming Chen, Kai Zhang, Jianghua Wan, Xiaowen Chen, Hu Chen, Haibo Wang
2011	—	`conf`	AIFSP: An Adaptive Instruction Flow Stream Processor. ISVLSI Yaohua Wang, Shuming Chen, Jianghua Wan, Kai Zhang, Shenggang Chen
2011	—	`conf`	Accelerating the data shuffle operations for FFT algorithms on SIMD DSPs. ASICON Kai Zhang, Shuming Chen, Sheng Liu, Yaohua Wang, Junhui Huang
2011	J	`jnl`	LP2D: a novel low-power 2D memory for sliding-window applications in vector DSPs. IEICE Electron. Express Sheng Liu, Shuming Chen, Xi Ning, Jianghua Wan, Hu Chen, Kai Zhang, Yaohua Wang
2011	J	`jnl`	SUCA: a scalable unicore architecture with novel instruction encoding and distributed execution control. IEICE Electron. Express Hu Chen, Shuming Chen, Yaohua Wang, Kai Zhang