Kai-Chiang Wu

82 papers A* 6A 17C 2Misc 9Journal 30Unranked 18
YearRankTypeTitle / Venue / Authors
2026 A* conf
SkipCat: Rank-Maximized Low-Rank Compression of Large Language Models via Shared Projection and Block Skipping.
AAAI
Yu-Chen Lu, Sheng-Feng Yu, Hui-Hsien Weng, Pei-Shuo Wang, Yu-Fang Hu, Liang Hung-Chun, Hung-Yueh Chiang, Kai-Chiang Wu
2025 A* conf
FLRC: Fine-grained Low-Rank Compressor for Efficient LLM Inference.
EMNLP
Yu-Chen Lu, Chong-Yan Chen, Chi-Chih Chang, Yu-Fang Hu, Kai-Chiang Wu
2025 J jnl
FLRC: Fine-grained Low-Rank Compressor for Efficient LLM Inference.
CoRR
Yu-Chen Lu, Chong-Yan Chen, Chi-Chih Chang, Yu-Fang Hu, Kai-Chiang Wu
2025 A conf
Integrating Neural Architecture Search and Rematerialization for Efficient On-Device Learning.
GECCO
Chih-Ling Chen, Kai-Chiang Wu, Ning-Chi Huang
2025 A conf
Invited Paper: 2025 ICCAD CAD Contest Problem A: Hardware Trojan Detection on Gate-Level Netlist.
ICCAD
Chung-Han Chou, Chih-Jen (Jacky) Hsu, Hung-Chun Chiu, Kai-Chiang Wu, Yu-Guang Chen, Zhuo Li
2025 A* conf
Palu: KV-Cache Compression with Low-Rank Projection.
ICLR
Chi-Chih Chang, Wei-Cheng Lin, Chien-Yu Lin, Chong-Yan Chen, Yu-Fang Hu, Pei-Shuo Wang, Ning-Chi Huang, Luis Ceze, Mohamed S. Abdelfattah, Kai-Chiang Wu
2025 A* conf
Quamba2: A Robust and Scalable Post-training Quantization Framework for Selective State Space Models.
ICML
Hung-Yueh Chiang, Chi-Chih Chang, Natalia Frumkin, Kai-Chiang Wu, Mohamed S. Abdelfattah, Diana Marculescu
2025 J jnl
Quamba2: A Robust and Scalable Post-training Quantization Framework for Selective State Space Models.
CoRR
Hung-Yueh Chiang, Chi-Chih Chang, Natalia Frumkin, Kai-Chiang Wu, Mohamed S. Abdelfattah, Diana Marculescu
2025 A* conf
Quamba: A Post-Training Quantization Recipe for Selective State Space Models.
ICLR
Hung-Yueh Chiang, Chi-Chih Chang, Natalia Frumkin, Kai-Chiang Wu, Diana Marculescu
2025 J jnl
QuarterMap: Efficient Post-Training Token Pruning for Visual State Space Models.
CoRR
Tien-Yu Chi, Hung-Yueh Chiang, Diana Marculescu, Kai-Chiang Wu
2025 J jnl
SkipCat: Rank-Maximized Low-Rank Compression of Large Language Models via Shared Projection and Block Skipping.
CoRR
Yu-Chen Lu, Sheng-Feng Yu, Hui-Hsien Weng, Pei-Shuo Wang, Yu-Fang Hu, Liang Hung-Chun, Hung-Yueh Chiang, Kai-Chiang Wu
2025 J jnl
Speculate Deep and Accurate: Lossless and Training-Free Acceleration for Offloaded LLMs via Substitute Speculative Decoding.
CoRR
Pei-Shuo Wang, Jian-Jia Chen, Chun-Che Yang, Chi-Chih Chang, Ning-Chi Huang, Mohamed S. Abdelfattah, Kai-Chiang Wu
2025 A conf
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration.
FPGA
Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu
2025 J jnl
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration.
CoRR
Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu
2025 J jnl
UniQL: Unified Quantization and Low-rank Compression for Adaptive Edge LLMs.
CoRR
Hung-Yueh Chiang, Chi-Chih Chang, Yu-Chen Lu, Chien-Yu Lin, Kai-Chiang Wu, Mohamed S. Abdelfattah, Diana Marculescu
2025 J jnl
xKV: Cross-Layer SVD for KV-Cache Compression.
CoRR
Chi-Chih Chang, Chien-Yu Lin, Yash Akhauri, Wei-Cheng Lin, Kai-Chiang Wu, Luis Ceze, Mohamed S. Abdelfattah
2024 — conf
ELSA: Exploiting Layer-wise N: M Sparsity for Vision Transformer Acceleration.
CVPR Workshops
Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu
2024 J jnl
ELSA: Exploiting Layer-wise N:M Sparsity for Vision Transformer Acceleration.
CoRR
Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu
2024 A conf
FLORA: Fine-grained Low-Rank Architecture Search for Vision Transformer.
WACV
Chi-Chih Chang, Yuan-Yao Sung, Shixing Yu, Ning-Chi Huang, Diana Marculescu, Kai-Chiang Wu
2024 J jnl
Palu: Compressing KV-Cache with Low-Rank Projection.
CoRR
Chi-Chih Chang, Wei-Cheng Lin, Chien-Yu Lin, Chong-Yan Chen, Yu-Fang Hu, Pei-Shuo Wang, Ning-Chi Huang, Luis Ceze, Kai-Chiang Wu
2024 J jnl
Quamba: A Post-Training Quantization Recipe for Selective State Space Models.
CoRR
Hung-Yueh Chiang, Chi-Chih Chang, Natalia Frumkin, Kai-Chiang Wu, Diana Marculescu
2024 J jnl
Reliability Engineering in a Time of Rapidly Converging Technologies.
IEEE Trans. Reliab.
Shiuhpyng Winston Shieh, Jeffrey M. Voas, Phil Laplante, Jason W. Rupe, Christian K. Hansen, Yu-Sung Wu, Yi-Ting Chen, Chi-Yu Li, Kai-Chiang Wu
2024 — conf
Synergizing GCN and GAT for Hardware Trojan Detection and Localization.
DSN-S
Yu-Chen Hsiao, Chia-Heng Yen, Bo-Yang Ke, Kai-Chiang Wu
2024 Misc conf
Transformer and Its Variants for Identifying Good Dice in Bad Neighborhoods.
VTS
Cheng-Che Lu, Chi-Chih Chang, Chia-Heng Yen, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao
2024 J jnl
V"Mean"ba: Visual State Space Models only need 1 hidden dimension.
CoRR
Tien-Yu Chi, Hung-Yueh Chiang, Chi-Chih Chang, Ning-Chi Huang, Kai-Chiang Wu
2024 A conf
Wafer-View Defect-Pattern-Prominent GDBN Method Using MetaFormer Variant.
ITC
Shu-Wen Li, Chia-Heng Yen, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao
2023 J jnl
CNN-Based Stochastic Regression for IDDQ Outlier Identification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chia-Heng Yen, Chun-Teng Chen, Cheng-Yen Wen, Ying-Yen Chen, Jih-Nung Lee, Shu-Yi Kao, Kai-Chiang Wu, Mango Chia-Tso Chao
2023 — conf
Decomposable Architecture and Fault Mitigation Methodology for Deep Learning Accelerators.
ISQED
Ning-Chi Huang, Min-Syue Yang, Ya-Chu Chang, Kai-Chiang Wu
2023 A conf
Enhancing Good-Die-in-Bad-Neighborhood Methodology with Wafer-Level Defect Pattern Information.
ITC
Ching-Min Liu, Chia-Heng Yen, Shu-Wen Lee, Kai-Chiang Wu, Mango Chia-Tso Chao
2023 J jnl
FLORA: Fine-grained Low-Rank Architecture Search for Vision Transformer.
CoRR
Chi-Chih Chang, Yuan-Yao Sung, Shixing Yu, Ning-Chi Huang, Diana Marculescu, Kai-Chiang Wu
2023 — conf
MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine.
ICFPT
Endri Taka, Aman Arora, Kai-Chiang Wu, Diana Marculescu
2023 J jnl
MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine.
CoRR
Endri Taka, Aman Arora, Kai-Chiang Wu, Diana Marculescu
2023 Misc conf
Outlier Detection for Analog Tests Using Deep Learning Techniques.
VTS
Chin-Kuan Lin, Cheng-Che Lu, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao
2023 — conf
Q-YOLOP: Quantization-Aware You Only Look Once for Panoptic Driving Perception.
ICME Workshops
Chi-Chih Chang, Wei-Cheng Lin, Pei-Shuo Wang, Sheng-Feng Yu, Yu-Chen Lu, Kuan-Cheng Lin, Kai-Chiang Wu
2023 J jnl
Q-YOLOP: Quantization-aware You Only Look Once for Panoptic Driving Perception.
CoRR
Chi-Chih Chang, Wei-Cheng Lin, Pei-Shuo Wang, Sheng-Feng Yu, Yu-Chen Lu, Kuan-Cheng Lin, Kai-Chiang Wu
2023 Misc conf
Test Generation for Defect-Based Faults of Scan Flip-Flops.
VTS
Yu-Teng Nien, Chen-Hong Li, Pei-Yin Wu, Yung-Jheng Wang, Kai-Chiang Wu, Mango C.-T. Chao
2023 — conf
Using Path Features for Hardware Trojan Detection Based on Machine Learning Techniques.
ISQED
Chia-Heng Yen, Jung-Che Tsai, Kai-Chiang Wu
2022 A conf
Improving Cell-Aware Test for Intra-Cell Short Defects.
DATE
Dong-Zhen Lee, Ying-Yen Chen, Kai-Chiang Wu, Mango C.-T. Chao
2022 J jnl
Methodology of Generating Timing-Slack-Based Cell-Aware Tests.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yu-Teng Nien, Kai-Chiang Wu, Dong-Zhen Lee, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao
2022 Misc conf
Rule Generation for Classifying SLT Failed Parts.
VTS
Ho-Chieh Hsu, Cheng-Che Lu, Shih-Wei Wang, Kelly Jones, Kai-Chiang Wu, Mango C.-T. Chao
2022 J jnl
Test Methodology for Defect-Based Bridge Faults.
IEEE Trans. Very Large Scale Integr. Syst.
Shuo-Wen Chang, Yu-Teng Nien, Yu-Pang Hu, Kai-Chiang Wu, Chi Chun Wang, Fu-Sheng Huang, Yi-Lun Tang, Yung-Chen Chen, Ming-Chien Chen, Mango C.-T. Chao
2022 J jnl
Timing Variability-Aware Analysis and Optimization for Variable-Latency Designs.
IEEE Trans. Very Large Scale Integr. Syst.
Ning-Chi Huang, Chao-Wei Cheng, Kai-Chiang Wu
2021 Misc conf
An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention.
VTS
Ning-Chi Huang, Wei-Kai Tseng, Huan-Jan Chou, Kai-Chiang Wu
2021 — conf
FOX-NAS: Fast, On-device and Explainable Neural Architecture Search.
ICCVW
Chia-Hsiang Liu, Yu-Shin Han, Yuan-Yao Sung, Yi Lee, Hung-Yueh Chiang, Kai-Chiang Wu
2021 J jnl
FOX-NAS: Fast, On-device and Explainable Neural Architecture Search.
CoRR
Chia-Hsiang Liu, Yu-Shin Han, Yuan-Yao Sung, Yi Lee, Hung-Yueh Chiang, Kai-Chiang Wu
2021 J jnl
Highly Uniform All-Vacuum-Deposited Inorganic Perovskite Artificial Synapses for Reservoir Computing.
Adv. Intell. Syst.
Li-Wei Chen, Wei-Chun Wang, Shao-Han Ko, Chien-Yu Chen, Chih-Ting Hsu, Fu-Ching Chiao, Tse-Wei Chen, Kai-Chiang Wu, Hao-Wu Lin
2021 J jnl
Highly Uniform All-Vacuum-Deposited Inorganic Perovskite Artificial Synapses for Reservoir Computing.
Adv. Intell. Syst.
Li-Wei Chen, Wei-Chun Wang, Shao-Han Ko, Chien-Yu Chen, Chih-Ting Hsu, Fu-Ching Chiao, Tse-Wei Chen, Kai-Chiang Wu, Hao-Wu Lin
2021 Misc conf
Identifying Good-Dice-in-Bad-Neighborhoods Using Artificial Neural Networks.
VTS
Cheng-Hao Yang, Chia-Heng Yen, Ting-Rui Wang, Chun-Teng Chen, Mason Chern, Ying-Yen Chen, Jih-Nung Lee, Shu-Yi Kao, Kai-Chiang Wu, Mango Chia-Tso Chao
2021 — conf
ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.
VLSI-DAT
Samuel Liu, Jen-Ho Kuo, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, M.-H. Yang, Kai-Chiang Wu
2021 — conf
The 2020 Low-Power Computer Vision Challenge.
AICAS
Xiao Hu, Ming-Ching Chang, Yuwei Chen, Rahul Sridhar, Zhenyu Hu, Yunhe Xue, Zhenyu Wu, Pengcheng Pi, Jiayi Shen, Jianchao Tan, Xiangru Lian, Ji Liu, Zhangyang Wang, Chia-Hsiang Liu, Yu-Shin Han, Yuan-Yao Sung, Yi Lee, Kai-Chiang Wu, Wei-Xiang Guo, Rick Lee, Shengwen Liang, Zerun Wang, Guiguang Ding, Gang Zhang, Teng Xi, Yubei Chen, Han Cai, Ligeng Zhu, Zhekai Zhang, Song Han, Seonghwan Jeong, YoungMin Kwon, Tianzhe Wang, Jeffery Pan
2020 Misc conf
CNN-based Stochastic Regression for IDDQ Outlier Identification.
VTS
Chun-Teng Chen, Chia-Heng Yen, Cheng-Yen Wen, Cheng-Hao Yang, Kai-Chiang Wu, Mason Chern, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao
2020 — conf
Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator.
VLSI-DAT
Shu-Ming Liu, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, Ming-Xue Yang, Kai-Chiang Wu
2020 J jnl
Making Aging Useful by Recycling Aging-induced Clock Skew.
ACM Trans. Design Autom. Electr. Syst.
Tien-Hung Tseng, Chung-Han Chou, Kai-Chiang Wu
2020 — conf
Selective Sensor Placement for Cost-Effective Online Aging Monitoring and Resilience.
ISPD
Hao-Chun Chang, Li-An Huang, Kai-Chiang Wu, Yu-Guang Chen
2020 — conf
Test Methodology for Defect-based Bridge Faults.
ITC-Asia
Yu-Pang Hu, Shuo-Wen Chang, Kai-Chiang Wu, Chi Chun Wang, Fu-Sheng Huang, Yi-Lun Tang, Yung-Chen Chen, Ming-Chien Chen, Mango C.-T. Chao
2019 — conf
Aging-aware chip health prediction adopting an innovative monitoring strategy.
ASP-DAC
Yun-Ting Wang, Kai-Chiang Wu, Chung-Han Chou, Shih-Chieh Chang
2019 — conf
Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs.
ISVLSI
Ning-Chi Huang, Yu-Guang Chen, Kai-Chiang Wu
2019 C conf
ICE-RADAR: In-situ, Cost-Effective Razor Flip-Flop Deployment for Aging Resilience.
IOLTS
Kai-Chiang Wu, Wei-Tao Huang, Chiao-Yang Huang
2019 Misc conf
Layout-Based Dual-Cell-Aware Tests.
VTS
Tse-Wei Wu, Dong-Zhen Lee, Yu-Hao Huang, Mango C.-T. Chao, Kai-Chiang Wu, Shu-Yi Kao, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee
2019 A conf
Methodology of Generating Timing-Slack-Based Cell-Aware Tests.
ITC
Yu-Teng Nien, Kai-Chiang Wu, Dong-Zhen Lee, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao
2019 A conf
Sensor-Based Approximate Adder Design for Accelerating Error-Tolerant and Deep-Learning Applications.
DATE
Ning-Chi Huang, Szu-Ying Chen, Kai-Chiang Wu
2018 — conf
Lifetime Reliability Trojan Based on Exploring Malicious Aging.
ATS
Tien-Hung Tseng, Shou-Chun Li, Kai-Chiang Wu
2018 A conf
MAUI: Making aging useful, intentionally.
DATE
Kai-Chiang Wu, Tien-Hung Tseng, Shou-Chun Li
2018 J jnl
Sensor-Based Time Speculation in the Presence of Timing Variability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chung-Han Chou, Tsui-Yun Chang, Kai-Chiang Wu, Shih-Chieh Chang
2017 A conf
Analysis and optimization of variable-latency designs in the presence of timing variability.
DATE
Chang-Lin Tsai, Chao-Wei Cheng, Ning-Chi Huang, Kai-Chiang Wu
2017 Misc conf
Fast WAT test structure for measuring Vt variance based on latch-based comparators.
VTS
Kao-Chi Lee, Kai-Chiang Wu, Chih-Ying Tsai, Mango Chia-Tso Chao
2017 — conf
Workload-aware lifetime Trojan based on statistical aging manipulation.
DSC
Tien-Hung Tseng, Shu-Sheng Wang, Jian-You Chen, Kai-Chiang Wu
2014 J jnl
BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kai-Chiang Wu, Ing-Chao Lin, Yao-Te Wang, Shuen-Shiang Yang
2014 J jnl
NBTI and Leakage Reduction Using ILP-Based Approach.
IEEE Trans. Very Large Scale Integr. Syst.
Ing-Chao Lin, Kuan-Hui Li, Chia-Hao Lin, Kai-Chiang Wu
2014 J jnl
Power-Planning-Aware Soft Error Hardening via Selective Voltage Assignment.
IEEE Trans. Very Large Scale Integr. Syst.
Kai-Chiang Wu, Diana Marculescu
2013 J jnl
A Low-Cost, Systematic Methodology for Soft Error Robustness of Logic Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Kai-Chiang Wu, Diana Marculescu
2012 A conf
Mitigating lifetime underestimation: A system-level approach considering temperature variations and correlations between failure mechanisms.
DATE
Kai-Chiang Wu, Ming-Chao Lee, Diana Marculescu, Shih-Chieh Chang
2011 A conf
Aging-aware timing analysis and optimization considering path sensitization.
DATE
Kai-Chiang Wu, Diana Marculescu
2011 A conf
Analysis and mitigation of NBTI-induced performance degradation for power-gated circuits.
ISLPED
Kai-Chiang Wu, Diana Marculescu, Ming-Chao Lee, Shih-Chieh Chang
2010 A conf
Clock skew scheduling for soft-error-tolerant sequential circuits.
DATE
Kai-Chiang Wu, Diana Marculescu
2009 A conf
Joint logic restructuring and pin reordering against NBTI-induced performance degradation.
DATE
Kai-Chiang Wu, Diana Marculescu
2008 C conf
Power-aware soft error hardening via selective voltage scaling.
ICCD
Kai-Chiang Wu, Diana Marculescu
2008 A conf
Process variability-aware transient fault modeling and analysis.
ICCAD
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marculescu
2008 — conf
Soft error rate reduction using redundancy addition and removal.
ASP-DAC
Kai-Chiang Wu, Diana Marculescu
2007 J jnl
Contouring Control of Smooth Paths for Multiaxis Motion Systems Based on Equivalent Errors.
IEEE Trans. Control. Syst. Technol.
Shyh-Leh Chen, Kai-Chiang Wu
2006 — conf
Delay variation tolerance for domino circuits.
ASP-DAC
Kai-Chiang Wu, Cheng-Tao Hsieh, Shih-Chieh Chang
2004 A* conf
Re-synthesis for delay variation tolerance.
DAC
Shih-Chieh Chang, Cheng-Tao Hsieh, Kai-Chiang Wu