Ka Nang Leung - RankMe

95 papers C 12Journal 58Unranked 25

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	16.2 A Bias-Flip-Based Piezoelectric Energy Harvesting Interface with a Digital Track-and-Lock MPPT Achieving Sampling-Free Operation and 99.8% MPPT Efficiency. ISSCC Rui Zhang, Chuhui Wang, Zhongxin Ye, Ka Nang Leung, Jianping Guo
2026	J	`jnl`	A Direct 24/48 V-to-1 V Dual-Phase Hybrid DC-DC Converter With V IEEE Trans. Circuits Syst. I Regul. Pap. Yinglyu Xiong, Xun Liu, Ka Nang Leung
2026	—	`conf`	A RHP-Zero-Free Hybrid Step-Up Converter With 95.1% Peak Efficiency for Fast-Transient Applications. ASP-DAC Junyi Ruan, Junmin Jiang, Chenzhou Ding, Yanhui Wu, Ka Nang Leung, Xun Liu
2026	J	`jnl`	A hybrid single-inductor dual-output converter with adaptive flying capacitors distribution. Microelectron. J. Meng Wang, Changhong Peng, Ka Nang Leung, Yanqi Zheng
2025	J	`jnl`	A 1.48-fs FoM Analog Capacitorless-LDO With Cascade-Inverter-Based Pseudo-Power Transistor. IEEE Solid State Circuits Lett. Hing Tai Chen, Xun Liu, Ka Nang Leung
2025	J	`jnl`	A 9.84-μW 148.9-dB Total DR Light-to-Digital Converter With Current-Integration SAR Quantizer for Multi-Wavelength PPG Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Yun-Hung Gao, Junwen Li, Chun-Ho Fan, Ka Nang Leung, Yuan-Ting Zhang, Kong-Pang Pun
2025	J	`jnl`	A Bridge-Less Hybrid SSHI Rectifier With High Efficiency Over Wide Load Range for Piezoelectric Energy Harvesting. IEEE J. Solid State Circuits Chuhui Wang, Jianping Guo, Ka Nang Leung
2025	J	`jnl`	A High-Current-Efficiency Digital-Assisted Analog LDO With Dual-Biasing Mode for Near-Threshold Regulation. IEEE J. Solid State Circuits Yajun Lin, Hing Tai Chen, Xun Liu, Ka Nang Leung
2025	J	`jnl`	A Hybrid Buck-or-Boost Converter for Fast-Transient and Wide-Voltage-Range Applications With Continuous Output Delivery Current. IEEE J. Solid State Circuits Junyi Ruan, Junmin Jiang, Chenzhou Ding, Kai Yuan, Ka Nang Leung, Zhiyuan Chen, Xiaoyang Zeng, Xun Liu
2025	C	`conf`	Analysis and Modeling of Hybrid Boost Converter With Always Reduced Inductor Current and Continuous Output-Current Delivery. ISCAS Yinglyu Xiong, Zehao Tao, Miaomiao Chen, Xun Liu, Ka Nang Leung
2025	J	`jnl`	Passivity-Based Controller Design of LCL-Filtered Selective-Harmonic Resistive-Active Power Filter. IEEE Trans. Ind. Electron. Chao Gao, Shan He, Rui Kong, Ka Nang Leung, Poh Chiang Loh
2024	J	`jnl`	A 2.8 μs Response Time 95.1% Efficiency Hybrid Boost Converter With RHP Zero Elimination for Fast-Transient Applications. IEEE J. Solid State Circuits Junyi Ruan, Junmin Jiang, Chenzhou Ding, Yunxiao Li, Yanhui Wu, Ka Nang Leung, Xun Liu
2024	—	`conf`	A 4-Phase Integrated Voltage Regulator with In-Package Inductors Achieving 89.0% Peak Efficiency and 65% Droop Improvement for 6A/2ns Transient. A-SSCC Kai Yuan, Chenzhou Ding, Junmin Jiang, Tiantian Tang, Junyi Ruan, Yelei Xie, Faen Liu, Shuguo Jiang, Tao Liu, Ka Nang Leung, Xun Liu
2024	—	`conf`	A Li-ion-Battery-Input 1-to-6V-Output Bootstrap-Free Hybrid Buck-or-Boost Converter Without RHP Zero Achieving 97.3% Peak Efficiency 6μs Recovery Time and 1.13μs/V DVS Rate. ISSCC Junyi Ruan, Junmin Jiang, Chenzhou Ding, Kai Yuan, Ka Nang Leung, Xun Liu
2024	J	`jnl`	An Adaptive Zero-Current Detector for Single-Inductor Multiple-Output DC-DC Converter With Full-Wave Current Sensor. IEEE Trans. Very Large Scale Integr. Syst. Yichen Zhang, Chaowei Tang, Yanqi Zheng, Xian Tang, Ka Nang Leung
2023	C	`conf`	A Decentralized Control Scheme for Active Power Filter Parallel System. IECON Chao Gao, Shan He, Pooya Davari, Frede Blaabjerg, Ka Nang Leung, Poh Chiang Loh
2022	J	`jnl`	A Hybrid Low-Dropout Regulator With Load Regulation Correction. IEEE Access Yuet Ho Woo, Jianxin Yang, Jianping Guo, Yanqi Zheng, Ka Nang Leung
2022	J	`jnl`	A Triple-Mode DC-DC Converter With Wide Input and Load Ranges for Energy Harvesting in IoT Edge Nodes. IEEE Trans. Circuits Syst. II Express Briefs Jianxin Yang, Bin Li, Ka Nang Leung, Zhijian Chen, Yanqi Zheng
2022	J	`jnl`	An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator. IEEE Access Yuet Ho Woo, Jianxin Yang, Junwen Li, Jianping Guo, Yanqi Zheng, Ka Nang Leung
2022	—	`conf`	An Ultra-Low-Supply Output-Capacitorless LDO with Signal- and Transient-Enhancement. APCCAS Yajun Lin, Haozheng Wan, Jianxin Yang, Ka Nang Leung
2022	J	`jnl`	Full-Wave Sense-FET-Based Inductor-Current Sensor With Wide Dynamic Range for Buck Converters. IEEE Trans. Circuits Syst. II Express Briefs Yong Zhou, Qingqing Cheng, Junwen Li, Yanqi Zheng, Ka Nang Leung
2021	J	`jnl`	A dual-power-path charge pump for solar-energy harvesting. Int. J. Circuit Theory Appl. Tin Wai Mui, Jianxin Yang, Yajun Lin, Yong Zhou, Yanqi Zheng, Jianping Guo, Ka Nang Leung
2020	J	`jnl`	A 40nm CMOS Hysteretic Buck DC-DC Converter With Digital-Controlled Power-Driving-Tracked-Duration Current Pump. IEEE Access Xiangbin Ding, Pak Kwong Chan, Ka Nang Leung
2020	J	`jnl`	Adaptive-biased sense-FET-based inductor-current sensor for 10-MHz buck converter. Int. J. Circuit Theory Appl. Yong Zhou, Xiaohui Lin, Jianxin Yang, Yanqi Zheng, Ka Nang Leung
2020	C	`conf`	An Output-Capacitorless Low-Dropout Regulator with High Slew Rate and Unity-Gain Bandwidth. ISCAS Yong Zhou, Yanqi Zheng, Ka Nang Leung
2020	J	`jnl`	Bandwidth and Slew Rate Enhanced OTA With Sustainable Dynamic Bias. IEEE Trans. Circuits Syst. II Express Briefs Cheuk Ho Hung, Yanqi Zheng, Jianping Guo, Ka Nang Leung
2019	J	`jnl`	Low-dropout regulator with dual cross-coupled current mirrors. Int. J. Circuit Theory Appl. Yuet Ho Woo, Ka Nang Leung, Yanqi Zheng, Jianping Guo
2018	J	`jnl`	A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor. Microelectron. J. Zhao Wang, Biao Chen, Lei Zhu, Yanqi Zheng, Jianping Guo, Dihu Chen, Marco Ho, Ka Nang Leung
2018	J	`jnl`	A Fully Integrated Low-Dropout Regulator With Differentiator-Based Active Zero Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. Shi Bu, Ka Nang Leung, Yan Lu, Jianping Guo, Yanqi Zheng
2017	J	`jnl`	Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load. Int. J. Circuit Theory Appl. Ming Wai Lau, Kai Ho Mak, Ka Nang Leung, Jianping Guo, Wang Ling Goh
2016	—	`conf`	A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter. ISIC Biao Chen, Lei Zhu, Yanqi Zheng, Jianping Guo, Marco Ho, Ka Nang Leung, Dihu Chen, Yang Liu
2016	J	`jnl`	A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages. IEEE Trans. Very Large Scale Integr. Syst. Marco Ho, Jianping Guo, Tin Wai Mui, Kai Ho Mak, Wang Ling Goh, Hiu Ching Poon, Shi Bu, Ming Wai Lau, Ka Nang Leung
2016	—	`conf`	A fast-response buck-boost DC-DC converter with constructed full-wave current sensor. ISIC Lei Zhu, Biao Chen, Yanqi Zheng, Jianping Guo, Marco Ho, Ka Nang Leung, Dihu Chen, Yang Liu
2016	—	`conf`	A regulated voltage multiplier for passive RFID Tag. ISIC Jingbin Jia, Marco Ho, Ka Nang Leung, Jianping Guo
2016	J	`jnl`	Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator. Int. J. Circuit Theory Appl. Jianping Guo, Marco Ho, Ka Nang Leung, Guangxiang Li
2015	J	`jnl`	A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW. IEEE J. Solid State Circuits Kai Ho Mak, Ming Wai Lau, Jianping Guo, Tin Wai Mui, Marco Ho, Wang Ling Goh, Ka Nang Leung
2015	J	`jnl`	A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End. IEEE Trans. Very Large Scale Integr. Syst. Hao Wang, Xian Tang, Chiu-sing Choy, Ka Nang Leung, Kong-Pang Pun
2015	—	`conf`	A digital-control sensorless current-mode boost converter with non-zero error bin compensation and seamless mode transition. SoCC Yanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo, Biao Chen
2015	C	`conf`	A fixed-frequency auto-buck-boost SIMO DC-DC converter with duty-cycle redistribution and duty-predicted current control. ISCAS Yanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo
2015	—	`conf`	A robust cross-regulation-suppressed single-inductor multiple-output dc-dc converter with duty-regulated comparator control. MWSCAS Yanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo, Hua Chen
2015	C	`conf`	Design considerations of STCB OTA in CMOS 65nm with large capacitive loads. ISCAS Kai Ho Mak, Marco Ho, Ka Nang Leung, Wang Ling Goh
2015	C	`conf`	Gain and slew rate enhancement for amplifiers through current starving and feeding. ISCAS Shi Bu, Hing Wa Tse, Ka Nang Leung, Jianping Guo, Marco Ho
2014	—	`conf`	A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing. APCCAS Marco Ho, Shi Bu, Yanqi Zheng, Ka Nang Leung, Jianping Guo
2014	J	`jnl`	A Signal- and Transient-Current Boosting Amplifier for Large Capacitive Load Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Kai Ho Mak, Ka Nang Leung
2014	J	`jnl`	An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V. IEEE Trans. Circuits Syst. II Express Briefs Tin Wai Mui, Marco Ho, Kai Ho Mak, Jianping Guo, Hua Chen, Ka Nang Leung
2014	—	`conf`	Analysis of CMOS low-dropout regulator - Power-supply rejection ratio. APCCAS Marco Ho, Ka Nang Leung, Pui Ying Or, Jianping Guo
2014	—	`conf`	Load regulation cancellation based on adaptive body bias for STC-LDOs. APCCAS Shi Bu, Marco Ho, Ka Nang Leung, Jianping Guo
2013	J	`jnl`	A transient-improved low-dropout regulator with nested flipped voltage follower structure. Int. J. Circuit Theory Appl. Hua Chen, Ka Nang Leung
2013	J	`jnl`	Sub-mW $LC$ Dual-Input Injection-Locked Oscillator for Autonomous WBSNs. IEEE Trans. Very Large Scale Integr. Syst. Kwan Wai Li, Ka Nang Leung, Lincoln Lai Kan Leung
2012	J	`jnl`	A CMOS voltage regulator for passive RFID tag ICs. Int. J. Circuit Theory Appl. Jianping Guo, Ka Nang Leung
2012	J	`jnl`	A Fast-Response Pseudo-PWM Buck Converter With PLL-Based Hysteresis Control. IEEE Trans. Very Large Scale Integr. Syst. Yanqi Zheng, Hua Chen, Ka Nang Leung
2012	—	`conf`	A low-power MICS fractional-N frequency synthesizer for implantable biomedical systems. APCCAS Kwan Wai Li, Ka Nang Leung
2012	J	`jnl`	Improved active-diode circuit used in voltage doubler. Int. J. Circuit Theory Appl. Jingbin Jia, Ka Nang Leung
2011	C	`conf`	Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applications. ISCAS Ka Nang Leung, Marco Ho, Jianping Guo, Pui Ying Or
2011	J	`jnl`	Dynamic Bias-Current Boosting Technique for Ultralow-Power Low-Dropout Regulator in Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs Marco Ho, Ka Nang Leung
2010	J	`jnl`	A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device. IEEE Trans. Circuits Syst. II Express Briefs Alex K. Y. Wong, Ka Nang Leung, Kong-Pang Pun, Yuan-Ting Zhang
2010	J	`jnl`	A 1.9 J. Low Power Electron. Ka Nang Leung, Felix Kok Man Cheung, Marco Ho, Hiu Ching Poon, Pui Ying Or
2010	J	`jnl`	A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology. IEEE J. Solid State Circuits Jianping Guo, Ka Nang Leung
2010	J	`jnl`	A CMOS Low-Dropout Regulator With a Momentarily Current-Boosting Voltage Buffer. IEEE Trans. Circuits Syst. I Regul. Pap. Ka Nang Leung, Yuen Sum Ng
2010	J	`jnl`	A Chip-Area Efficient Voltage Regulator for VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. Ka Nang Leung, Yuan Yen Mai, Philip K. T. Mok
2010	J	`jnl`	A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique. IEEE Trans. Circuits Syst. II Express Briefs Pui Ying Or, Ka Nang Leung
2010	J	`jnl`	A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders. IEEE J. Solid State Circuits Chi Fat Chan, Kong-Pang Pun, Ka Nang Leung, Jianping Guo, Lincoln Lai Kan Leung, Oliver Chiu-sing Choy
2010	J	`jnl`	A Low-Power Fast-Transient 90-nm Low-Dropout Regulator With Multiple Small-Gain Stages. IEEE J. Solid State Circuits Marco Ho, Ka Nang Leung, Ki-Leung Mak
2010	J	`jnl`	An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection. IEEE J. Solid State Circuits Pui Ying Or, Ka Nang Leung
2010	J	`jnl`	RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology. J. Low Power Electron. Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun, Lincoln Lai Kan Leung, Jianping Guo, Yuen Sum Ng, Chi Fat Chan, Weiwei Shi, Yang Hong, Marco Ho, Ki-Leung Mak, Yanqing Ai
2009	C	`conf`	A Fold-back Current-limit Circuit with Load-insensitive Quiescent Current for CMOS Low Dropout Regulator. ISCAS Jianping Guo, Ka Nang Leung
2009	C	`conf`	A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. ISCAS Chi Fat Chan, Weiwei Shi, Kong-Pang Pun, Lincoln Lai Kan Leung, Ka Nang Leung, Oliver Chiu-sing Choy
2009	C	`conf`	A Single-inductor Dual-output Pseudo-DCM/CCM Buck and Boost Converter with Adaptive DC Current Compensation. ISCAS Jingbin Jia, Ka Nang Leung
2009	C	`conf`	Robust and Low Complexity Packet Detector Design for MB-OFDM UWB. ISCAS Wen Fan, Oliver Chiu-sing Choy, Ka Nang Leung
2008	J	`jnl`	A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. IEEE Trans. Circuits Syst. II Express Briefs Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan, Ka Nang Leung
2008	J	`jnl`	A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection. IEEE Trans. Biomed. Circuits Syst. Alex K. Y. Wong, Kong-Pang Pun, Yuan-Ting Zhang, Ka Nang Leung
2008	—	`conf`	Compensation-Capacitor Free Pseudo Three-Stage Amplifier with Large Capacitive Loads. DELTA Ka Nang Leung, Yanqi Zheng
2008	—	`conf`	Design of a Low-Voltage CMOS Charge Pump. DELTA Chun Yu Cheng, Ka Nang Leung, Yi Ki Sun, Pui Ying Or
2008	—	`conf`	Design of passive UHF RFID tag in 130nm CMOS technology. APCCAS Yang Hong, Chi Fat Chan, Jianping Guo, Yuen Sum Ng, Weiwei Shi, Lincoln Lai Kan Leung, Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun
2008	J	`jnl`	Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC. IEEE Trans. Circuits Syst. I Regul. Pap. Tsz Yin Man, Ka Nang Leung, Chi Yat Leung, Philip K. T. Mok, Mansun Chan
2007	J	`jnl`	A Low-Dropout Regulator for SoC With Q-Reduction. IEEE J. Solid State Circuits Sai Kit Lau, Philip K. T. Mok, Ka Nang Leung
2006	J	`jnl`	A voltage-mode PWM buck regulator with end-point prediction. IEEE Trans. Circuits Syst. II Express Briefs Man Siu, Philip K. T. Mok, Ka Nang Leung, Yat-Hei Lam, Wing-Hung Ki
2005	J	`jnl`	A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS technologies. IEEE J. Solid State Circuits Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung
2005	J	`jnl`	An integrated CMOS current-sensing circuit for low-Voltage current-mode buck regulator. IEEE Trans. Circuits Syst. II Express Briefs Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung, Mansun Chan
2005	J	`jnl`	Design of low-power analog drivers based on slew-rate enhancement circuits for CMOS low-dropout regulators. IEEE Trans. Circuits Syst. II Express Briefs Hoi Lee, Philip K. T. Mok, Ka Nang Leung
2004	—	`conf`	A 1.2V buck converter with a novel on-chip low-voltage current-sensing scheme. ISCAS (5) Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung
2004	—	`conf`	A low-voltage CMOS low-dropout regulator with enhanced loop response. ISCAS (1) Ka Nang Leung, Philip K. T. Mok, Sai Kit Lau
2004	—	`conf`	Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference. CICC Philip K. T. Mok, Ka Nang Leung
2004	—	`conf`	Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference. ISCAS (1) Chi Yat Leung, Ka Nang Leung, Philip K. T. Mok
2003	J	`jnl`	A 2-V 23-μA 5.3-ppm/°C curvature-compensated CMOS bandgap voltage reference. IEEE J. Solid State Circuits Ka Nang Leung, Philip K. T. Mok, Chi Yat Leung
2003	J	`jnl`	A CMOS voltage reference based on weighted ΔV IEEE J. Solid State Circuits Ka Nang Leung, Philip K. T. Mok
2003	J	`jnl`	A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation. IEEE J. Solid State Circuits Ka Nang Leung, Philip K. T. Mok
2003	J	`jnl`	A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation. IEEE J. Solid State Circuits Hoi Lee, Ka Nang Leung, Philip K. T. Mok
2002	—	`conf`	A 2-V 23-μA 5.3-ppm/°C 4th-order curvature-compensated CMOS bandgap reference. CICC Ka Nang Leung, Philip K. T. Mok, Chi Yat Leung
2002	J	`jnl`	A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device. IEEE J. Solid State Circuits Ka Nang Leung, Philip K. T. Mok
2000	C	`conf`	Analysis on an alternative structure of damping-factor-control frequency compensation. ISCAS Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki, Johnny K. O. Sin
2000	J	`jnl`	Three-stage large capacitive load amplifier with damping-factor-control frequency compensation. IEEE J. Solid State Circuits Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki, Johnny K. O. Sin
1999	—	`conf`	A novel frequency compensation technique for low-voltage low-dropout regulator. ISCAS (5) Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki
1999	—	`conf`	Optimum nested Miller compensation for low-voltage low-power CMOS amplifier design. ISCAS (2) Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki
1999	—	`conf`	Right-half-plane zero removal technique for low-voltage low-power nested Miller compensation CMOS amplifier. ICECS Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki