| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2013 | — | conf |
ICETET
|
| 2013 | — | conf |
ICETET
|
| 2012 | J | jnl |
CoRR
|
| 2012 | — | conf |
Implementation of Gating Technique with Modified Scan Flip-Flop for Low Power Testing of VLSI Chips.
VDAT
|
| 2011 | — | conf |
ISMVL
|
| 2010 | J | jnl |
CoRR
|
| 2010 | J | jnl |
J. Next Gener. Inf. Technol.
|
| 2010 | J | jnl |
J. Next Gener. Inf. Technol.
|
| 2009 | — | conf |
ARTCom
|
| 2009 | — | conf |
ARTCom
|
| 2009 | — | conf |
CDES
|
| 2003 | — | conf |
FPT
|