Junran Pu - RankMe

12 papers C 3Journal 6Unranked 3

Year	Rank	Type	Title / Venue / Authors
2023	C	`conf`	A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. ISCAS Chen Shen, Junran Pu, Yi Sheng Chong, Zhongyi Zhang, Wang Ling Goh, Bin Zhao, Anh Tuan Do, Yuan Gao
2022	J	`jnl`	Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency. Neurocomputing Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
2022	J	`jnl`	Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140]. Neurocomputing Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
2021	J	`jnl`	A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Ming Ming Wong, Anh Tuan Do
2021	J	`jnl`	A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations. IEEE Trans. Circuits Syst. II Express Briefs Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Anh-Tuan Do
2021	J	`jnl`	A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. IEEE Trans. Circuits Syst. II Express Briefs Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Yi Sheng Chong, Anh Tuan Do
2021	J	`jnl`	Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
2020	—	`conf`	0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
2020	C	`conf`	Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do
2019	C	`conf`	Block-Based Spiking Neural Network Hardware with Deme Genetic Algorithm. ISCAS Junran Pu, Vishnu P. Nambiar, Anh-Tuan Do, Wang Ling Goh
2019	—	`conf`	Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. SoCC Yun Kwan Lee, Vishnu P. Nambiar, Junran Pu, Wang Ling Goh, Anh-Tuan Do
2019	—	`conf`	Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. SoCC Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do