Junichi Miyakoshi

29 papers A 1B 2C 2Journal 18Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
Market, power, gift, and concession economies: Comparison using four-mode primitive network models.
CoRR
Takeshi Kato, Junichi Miyakoshi, Misa Owa, Ryuji Mine
2023 J jnl
Mixbiotic society measures: Assessment of community well-going as living system.
CoRR
Takeshi Kato, Junichi Miyakoshi, Tadayuki Matsumura, Ryuji Mine, Hiroyuki Mizuno, Yasuo Deguchi
2023 J jnl
Mixbiotic society measures: Comparison of organizational structures based on communication simulation.
CoRR
Takeshi Kato, Junichi Miyakoshi, Tadayuki Matsumura, Yasuyuki Kudo, Ryuji Mine, Hiroyuki Mizuno, Yasuo Deguchi
2023 J jnl
Modeling pattern formation in communities by using information particles.
CoRR
Junichi Miyakoshi
2023 J jnl
Social Co-OS: Cyber-human social Co-operating system.
IET Cyper-Phys. Syst.: Theory & Appl.
Takeshi Kato, Yasuyuki Kudo, Junichi Miyakoshi, Misa Owa, Yasuhiro Asa, Takashi Numata, Ryuji Mine, Hiroyuki Mizuno
2023 J jnl
Subjective-objective policy making approach: Coupling of resident-values multiple regression analysis with value-indices, multi-agent-based simulation.
CoRR
Misa Owa, Junichi Miyakoshi, Takeshi Kato
2021 J jnl
Social Co-OS: Cyber-Human Social Co-Operating System.
CoRR
Takeshi Kato, Yasuyuki Kudo, Junichi Miyakoshi, Misa Owa, Yasuhiro Asa, Takashi Numata, Ryuji Mine, Hiroyuki Mizuno
2013 B conf
False-positive reduction of liver tumor detection using ensemble learning method.
Image Processing
Atsushi Miyamoto, Junichi Miyakoshi, Kazuki Matsuzaki, Toshiyuki Irie
2012 B conf
Metastatic liver tumor detection from 3D CT images using a level set algorithm with liver-edge term.
Image Processing
Junichi Miyakoshi, Shuntaro Yui, Kazuki Matsuzaki, Toshiyuki Irie
2012 — conf
Size-adaptive hepatocellular carcinoma detection from 3D CT images based on the level set method.
Computer-Aided Diagnosis
Shuntaro Yui, Junichi Miyakoshi, Kazuki Matsuzaki, Toshiyuki Irie, Ryo Kurazume
2011 J jnl
A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core.
IEICE Trans. Electron.
Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
2010 — conf
A 45nm 37.3GOPS/W heterogeneous multi-core SoC.
ISSCC
Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Shigezumi Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima
2008 J jnl
A Sub 100 mW H.264 [email protected] Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer.
IEICE Trans. Electron.
Yuichiro Murachi, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 J jnl
A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition.
IEICE Trans. Electron.
Yuichiro Murachi, Yuki Fukuyama, Ryo Yamamoto, Junichi Miyakoshi, Hiroshi Kawaguchi, Hajime Ishihara, Masayuki Miyama, Yoshio Matsuda, Masahiko Yoshimoto
2008 C conf
A sub 100 mW H.264/AVC [email protected] integer-pel motion estimation processor VLSI for MBAFF encoding.
ISCAS
Yuichiro Murachi, Kosuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 — conf
An H.264/AVC [email protected] quarter-pel motion estimation processor VLSI for real-time MBAFF encoding.
ICECS
Kosuke Mizuno, Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 J jnl
Novel Video Memory Reduces 45% of Bitline Power Using Majority Logic and Data-Bit Reordering.
IEEE Trans. Very Large Scale Integr. Syst.
Hidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 J jnl
A 0.3-V Operating,
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Kentaro Kawakami, Junichi Miyakoshi, Shinji Mikami, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 C conf
A Power- and Area-Efficient SRAM Core Architecture for Super-Parallel Video Processing.
VLSI-SoC
Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto, Tetsuro Matsuno
2006 J jnl
A Power- and Area-Efficient SRAM Core Architecture with Segmentation-Free and Horizontal/Vertical Accessibility for Super-Parallel Video Processing.
IEICE Trans. Electron.
Junichi Miyakoshi, Yuichiro Murachi, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 J jnl
A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Junichi Miyakoshi, Yuichiro Murachi, Tetsuro Matsuno, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masayuki Miyama, Masahiko Yoshimoto
2006 A conf
A two-port SRAM for real-time video processor saving 53% of bitline power with majority logic and data-bit reordering.
ISLPED
Hidehiro Fujiwara, Koji Nii, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 J jnl
VLSI Architecture Study of a Real-Time Scalable Optical Flow Processor for Video Segmentation.
IEICE Trans. Electron.
Noriyuki Minegishi, Junichi Miyakoshi, Yuki Kuroda, Tadayoshi Katagiri, Yuki Fukuyama, Ryo Yamamoto, Masayuki Miyama, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
2005 J jnl
A 95 mW MPEG2 MP@HL Motion Estimation Processor Core for Portable High-Resolution Video Application.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yuichiro Murachi, Koji Hamano, Tetsuro Matsuno, Junichi Miyakoshi, Masayuki Miyama, Masahiko Yoshimoto
2005 J jnl
A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation.
IEICE Trans. Electron.
Junichi Miyakoshi, Yuichiro Murachi, Koji Hamano, Tetsuro Matsuno, Masayuki Miyama, Masahiko Yoshimoto
2004 — conf
A sub-mW MPEG-4 motion estimation processor core for mobile video application.
ASP-DAC
Yuki Kuroda, Junichi Miyakoshi, Masayuki Miyama, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
2004 J jnl
A sub-mW MPEG-4 motion estimation processor core for mobile video application.
IEEE J. Solid State Circuits
Masayuki Miyama, Junichi Miyakoshi, Yuki Kuroda, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
2003 — conf
A sub-mW MPEG-4 motion estimation processor core for mobile video application.
CICC
Junichi Miyakoshi, Yuri Kuroda, Masayuki Miyama, Kosuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
2002 — conf
An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm.
CICC
Masayuki Miyama, Osamu Tooyama, N. Takamatsu, T. Kodake, K. Nakamura, A. Kato, Junichi Miyakoshi, K. Hashimoto, Shigenobu Komatsu, M. Yagi, Masao Morimoto, Kazuo Taki, Masahiko Yoshimoto