| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2016 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2015 | A* | conf |
DAC
|
| 2009 | A | conf |
DATE
|
| 2006 | A | conf |
DATE
|
| 2006 | J | jnl |
J. VLSI Signal Process.
|
| 2003 | — | conf |
ISCAS (5)
|
| 2003 | A | conf |
ICCAD
|
| 2003 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2002 | A* | conf |
DAC
|
| 2002 | A | conf |
ICCAD
|
| 2001 | J | jnl |
IEEE Trans. Computers
|
| 2000 | A* | conf |
A fine-grained arithmetic optimization technique for high-performance/low-power data path synthesis.
DAC
|
| 2000 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2000 | — | conf |
ASP-DAC
|
| 1999 | A | conf |
ICCAD
|