Jung Yun Choi - RankMe

14 papers A* 1A 4B 1Journal 4Unranked 4

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Estimation of Remaining Useful Life from the Aging Degradation in IC Performance Parameters. IRPS Jiho Lee, Jiwon Kim, Seyoung Kim, Young-Yun Lee, Kanghyun Seo, Jung Yun Choi
2024	B	`conf`	LayNet: Layout Size Prediction for Memory Design Using Graph Neural Networks in Early Design Stage. ASPDAC Hye Rim Ji, Jong Seong Kim, Jung Yun Choi, Jee Hyong Lee
2023	J	`jnl`	Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits. IEEE Access Seyoung Kim, Seungho Yang, Hyein Lim, Hyein Lee, Jongwook Jeon, Jung Yun Choi, Jaeha Kim
2021	A*	`conf`	Application of Deep Reinforcement Learning to Dynamic Verification of DRAM Designs. DAC Hyojin Choi, In Huh, Seungju Kim, Jeonghoon Ko, Changwook Jeong, Hyeonsik Son, Kiwon Kwon, Joonwan Chai, Younsik Park, Jaehoon Jeong, Daesin Kim, Jung Yun Choi
2016	A	`conf`	Adaptive delay monitoring for wide voltage-range operation. DATE Jongho Kim, Gunhee Lee, Kiyoung Choi, Yonghwan Kim, Wook Kim, Kyung Tae Do, Jung Yun Choi
2016	A	`conf`	Sequential analysis driven reset optimization to improve power, area and routability. DATE Srihari Yechangunja, Raj Shekhar, Mohit Kumar, Nikhil Tripathi, Abhishek Mittal, Abhishek Ranjan, Jianfeng Liu, Minyoung Mo, Kyung Tae Do, Jung Yun Choi, Sungho Park
2015	A	`conf`	Clock domain crossing aware sequential clock gating. DATE Jianfeng Liu, Mi-Suk Hong, Kyung Tae Do, Jung Yun Choi, Jaehong Park, Mohit Kumar, Manish Kumar, Nikhil Tripathi, Abhishek Ranjan
2015	—	`conf`	Coarse-grained Structural Placement for a Synthesized Parallel Multiplier. ISPD Sungmin Bae, Hyung-Ock Kim, Jung Yun Choi, Jaehong Park
2013	—	`conf`	Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics. CICC Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Matthias Sauer, Bernd Becker, Subhasish Mitra
2013	A	`conf`	Early-life-failure detection using SAT-based ATPG. ITC Matthias Sauer, Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Subhasish Mitra, Bernd Becker
2010	J	`jnl`	Supply Switching With Ground Collapse for Low-Leakage Register Files in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Hyung-Ock Kim, Bong Hyun Lee, Jong-Tae Kim, Jung Yun Choi, Kyu-Myung Choi, Youngsoo Shin
2007	—	`conf`	Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. ASP-DAC Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi
2007	J	`jnl`	Supply Switching With Ground Collapse: Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi
2001	J	`jnl`	Backward Propagated Capacitance Model for Register Transfer Level Power Estimation. VLSI Design Jung Yun Choi, Young Hwan Kim, Kyoung-Rok Cho