Jun Yu - RankMe

63 papers A* 16A 13B 7C 8Misc 3Journal 10Unranked 6

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	DIF-LUT Pro: An Automated Tool for Simple yet Scalable Approximation of Nonlinear Activation on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yang Liu, Shuyang Li, Yu Li, Ruiqi Chen, Shun Li, Jun Yu, Kun Wang
2026	—	`conf`	SLAWS: Spatial Locality Analysis and Workload Orchestration for Sparse Matrix Multiplication. ASPLOS (2) Guoyu Li, Zheng Guan, Beichen Zhang, Jun Yu, Kun Wang
2025	A	`conf`	FAMERS: An FPGA Accelerator for Memory-Efficient Edge-Rendered 3D Gaussian Splatting. DATE Yuanfang Wang, Yu Li, Jianli Chen, Jun Yu, Kun Wang
2025	A	`conf`	SiST: Token Similarity and Sparsity Aware Optimization for Transformers on FPGA. ICCAD Yifan Zhang, Hongji Wang, Genhao Zhang, Jianli Chen, Jun Yu, Kun Wang
2025	A	`conf`	ToMamba: Towards Token-Efficient Mamba Architecture on FPGA. ICCAD Kejia Shi, Yue Cao, Yuhang Du, Jianli Chen, Jun Yu, Kun Wang
2025	J	`jnl`	Trojan Insertion versus Layout Defenses for Modern ICs: Red-versus-Blue Teaming in a Competitive Community Effort. IACR Trans. Cryptogr. Hardw. Embed. Syst. Johann Knechtel, Mohammad Eslami, Peng Zou, Min Wei, Xingyu Tong, Binggang Qiu, Zhijie Cai, Guohao Chen, Benchao Zhu, Jiawei Li, Jun Yu, Jianli Chen, Chun-Wei Chiu, Min-Feng Hsieh, Chia-Hsiu Ou, Ting-Chi Wang, Bangqi Fu, Qijing Wang, Yang Sun, Qin Luo, Anthony W. H. Lau, Fangzhou Wang, Evangeline F. Y. Young, Shunyang Bi, Guangxin Guo, Haonan Wu, Zhengguang Tang, Hailong You, Cong Li, Ramesh Karri, Ozgur Sinanoglu, Samuel Pagliarini
2025	A*	`conf`	XShift: FPGA-efficient Binarized LLM with Joint Quantization and Sparsification. DAC Shuai Zhou, Huinan Tian, Sisi Meng, Jianli Chen, Jun Yu, Kun Wang
2024	B	`conf`	Booth-NeRF: An FPGA Accelerator for Instant-NGP Inference with Novel Booth-Multiplier. ASPDAC Zihang Ma, Zeyu Li, Yuanfang Wang, Yu Li, Jun Yu, Kun Wang
2024	A*	`conf`	CSTrans-OPU: An FPGA-based Overlay Processor with Full Compilation for Transformer Networks via Sparsity Exploration. DAC Yueyin Bai, Keqing Zhao, Yang Liu, Hongji Wang, Hao Zhou, Xiaoxing Wu, Jun Yu, Kun Wang
2024	A	`conf`	Edge-BiT: Software-Hardware Co-design for Optimizing Binarized Transformer Networks Inference on Edge FPGA. ICCAD Shuai Zhou, Sisi Meng, Huinan Tian, Jun Yu, Kun Wang
2024	A	`conf`	FAS-Trans: Fully Exploiting FFN and Attention Sparsity for Transformer on FPGA. ICCAD Hongji Wang, Kun Wang, Yifan Zhang, Jun Yu
2024	A*	`conf`	FLAME: Fully Leveraging MoE Sparsity for Transformer on FPGA. DAC Xuanda Lin, Huinan Tian, Wenxiao Xue, Lanqi Ma, Jialin Cao, Manting Zhang, Jun Yu, Kun Wang
2024	A	`conf`	FLOP: A Flexible Memory-Optimized Processor for Parallel Graph Mining on FPGA. ICCAD Guoyu Li, Runzhou Zhang, Jun Yu, Kun Wang
2024	A*	`conf`	FNM-Trans: Efficient FPGA-based Transformer Architecture with Full N: M Sparsity. DAC Manting Zhang, Jialin Cao, Kejia Shi, Keqing Zhao, Genhao Zhang, Jun Yu, Kun Wang
2024	B	`conf`	Fitop-Trans: Maximizing Transformer Pipeline Efficiency through Fixed-Length Token Pruning on FPGA. FPL Kejia Shi, Manting Zhang, Keqing Zhao, Xiaoxing Wu, Yang Liu, Jun Yu, Kun Wang
2024	J	`jnl`	Graph-OPU: A Highly Flexible FPGA-Based Overlay Processor for Graph Neural Networks. ACM Trans. Reconfigurable Technol. Syst. Enhao Tang, Shun Li, Ruiqi Chen, Hao Zhou, Yuhanxiao Ma, Haoyang Zhang, Jun Yu, Kun Wang
2024	B	`conf`	TransFRU: Efficient Deployment of Transformers on FPGA with Full Resource Utilization. ASPDAC Hongji Wang, Yueyin Bai, Jun Yu, Kun Wang
2024	A	`conf`	TransLib: An Extensible Graph-Aware Library Framework for Automated Generation of Transformer Operators on FPGA. ICCAD Yang Liu, Tianchen Wang, Yuxuan Dong, Zexu Zhang, Shun Li, Jun Yu, Kun Wang
2024	J	`jnl`	Trojan Insertion versus Layout Defenses for Modern ICs: Red-versus-Blue Teaming in a Competitive Community Effort. IACR Cryptol. ePrint Arch. Johann Knechtel, Mohammad Eslami, Peng Zou, Min Wei, Xingyu Tong, Binggang Qiu, Zhijie Cai, Guohao Chen, Benchao Zhu, Jiawei Li, Jun Yu, Jianli Chen, Chun-Wei Chiu, Min-Feng Hsieh, Chia-Hsiu Ou, Ting-Chi Wang, Bangqi Fu, Qijing Wang, Yang Sun, Qin Luo, Anthony W. H. Lau, Fangzhou Wang, Evangeline F. Y. Young, Shunyang Bi, Guangxin Guo, Haonan Wu, Zhengguang Tang, Hailong You, Cong Li, Ramesh Karri, Ozgur Sinanoglu, Samuel Pagliarini
2023	A*	`conf`	Access Your Tesla without Your Awareness: Compromising Keyless Entry System of Model 3. NDSS Xinyi Xie, Kun Jiang, Rui Dai, Jun Lu, Lihui Wang, Qing Li, Jun Yu
2023	J	`jnl`	Analytical Placement with 3D Poisson's Equation and ADMM-based Optimization for Large-scale 2.5D Heterogeneous FPGAs. ACM Trans. Design Autom. Electr. Syst. Min Wei, Xingyu Tong, Yuan Wen, Jianli Chen, Jun Yu, Wenxing Zhu, Yao-Wen Chang
2023	B	`conf`	DIF-LUT: A Simple Yet Scalable Approximation for Non-Linear Activation Function on FPGA. FPL Yang Liu, Xiaoming He, Jun Yu, Kun Wang
2023	C	`conf`	Edge FPGA-based Onsite Neural Network Training. ISCAS Ruiqi Chen, Haoyang Zhang, Yu Li, Runzhou Zhang, Guoyu Li, Jun Yu, Kun Wang
2023	A	`conf`	FET-OPU: A Flexible and Efficient FPGA-Based Overlay Processor for Transformer Networks. ICCAD Yueyin Bai, Hao Zhou, Keqing Zhao, Hongji Wang, Jianli Chen, Jun Yu, Kun Wang
2023	B	`conf`	FPGA Accelerating Multi-Source Transfer Learning with GAT for Bioactivities of Ligands Targeting Orphan G Protein-Coupled Receptors. FPL Ruiqi Chen, Haoyang Zhang, Jun Yu, Kun Wang
2023	B	`conf`	Graph-OPU: A Highly Integrated FPGA-Based Overlay Processor for Graph Neural Networks. FPL Ruiqi Chen, Haoyang Zhang, Shun Li, Enhao Tang, Jun Yu, Kun Wang
2023	A	`conf`	Graph-OPU: An FPGA-Based Overlay Processor for Graph Neural Networks. FPGA Ruiqi Chen, Haoyang Zhang, Yuhanxiao Ma, Enhao Tang, Shun Li, Yanxiang Zhu, Jun Yu, Kun Wang
2023	J	`jnl`	Incremental 3-D Global Routing Considering Cell Movement and Complex Routing Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Peng Zou, Zhijie Cai, Zhifeng Lin, Chenyue Ma, Jun Yu, Jianli Chen
2023	B	`conf`	LTrans-OPU: A Low-Latency FPGA-Based Overlay Processor for Transformer Networks. FPL Yueyin Bai, Hao Zhou, Keqing Zhao, Manting Zhang, Jianli Chen, Jun Yu, Kun Wang
2023	A*	`conf`	Mixed-cell-height Placement with Minimum-Implant-Area and Drain-to-Drain Abutment Constraints. DAC Guohao Chen, Zheng Zeng, Benchao Zhu, Jiawei Li, Kun Wang, Jun Yu, Jianli Chen
2023	Misc	`conf`	Moth: A Hardware Accelerator for Neural Radiance Field Inference on FPGA. FCCM Yuanfang Wang, Yu Li, Haoyang Zhang, Jun Yu, Kun Wang
2023	A	`conf`	PP-Transformer: Enable Efficient Deployment of Transformers Through Pattern Pruning. ICCAD Jialin Cao, Xuanda Lin, Manting Zhang, Kejia Shi, Jun Yu, Kun Wang
2023	A*	`conf`	PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration. DAC Zhijie Cai, Peng Zou, Zhengtao Wu, Xingyu Tong, Jun Yu, Jianli Chen, Yao-Wen Chang
2023	A*	`conf`	Toward Optimal Filler Cell Insertion with Complex Implant Layer Constraints. DAC Peng Zou, Guohao Chen, Zhifeng Lin, Jun Yu, Jianli Chen
2023	Misc	`conf`	Transformer-OPU: An FPGA-based Overlay Processor for Transformer Networks. FCCM Yueyin Bai, Hao Zhou, Keqing Zhao, Jianli Chen, Jun Yu, Kun Wang
2023	C	`conf`	eSSpMV: An Embedded-FPGA-based Hardware Accelerator for Symmetric Sparse Matrix-Vector Multiplication. ISCAS Ruiqi Chen, Haoyang Zhang, Yuhanxiao Ma, Jianli Chen, Jun Yu, Kun Wang
2023	—	`conf`	g-BERT: Enabling Green BERT Deployment on FPGA via Hardware-Aware Hybrid Pruning. ICC Yueyin Bai, Hao Zhou, Ruiqi Chen, Kuangjie Zou, Jialin Cao, Haoyang Zhang, Jianli Chen, Jun Yu, Kun Wang
2022	J	`jnl`	An Incremental Placement Flow for Advanced FPGAs With Timing Awareness. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhifeng Lin, Yanyue Xie, Peng Zou, Sifei Wang, Jun Yu, Jianli Chen
2022	Misc	`conf`	Biological Activity Prediction of GPCR-targeting Ligands on Heterogeneous FPGA-based Accelerators. FCCM Ruiqi Chen, Yuhanxiao Ma, Shaodong Zheng, Shizhen Huang, Chao Chen, Jun Yu, Kun Wang
2022	A*	`conf`	CNN-inspired analytical global placement for large-scale heterogeneous FPGAs. DAC Huimin Wang, Xingyu Tong, Chenyue Ma, Runming Shi, Jianli Chen, Kun Wang, Jun Yu, Yao-Wen Chang
2022	C	`conf`	Characterization of Single Event Upsets of Nanoscale FDSOI Circuits Based on the Simulation and Irradiation Results. ISCAS Luchang Ding, Chang Cai, Gengsheng Chen, Zehao Wu, Jing Zhang, Chang Wu, Jun Yu
2022	C	`conf`	Implementation of Radiation Hardened Flip-Flops Based on Novel Fishbone Layouts. ISCAS Chang Cai, Zehao Wu, Jing Zhang, Luchang Ding, Lei Shen, Jun Yu, Yaqing Chi
2022	J	`jnl`	Timing-Aware Fill Insertions With Design-Rule and Density Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiqiong Bai, Ziran Zhu, Pingping Li, Jianli Chen, Tingshen Lan, Xingquan Li, Jun Yu, Wenxing Zhu, Yao-Wen Chang
2022	—	`conf`	Voronoi Diagram Based Heterogeneous Circuit Layout Centerline Extraction for Mask Verification. ASP-DAC Xiqiong Bai, Ziran Zhu, Peng Zou, Jianli Chen, Jun Yu, Yao-Wen Chang
2021	—	`conf`	Analytical Global Placement for Heterogenous FPGAs Based on the eDensity Model. ASICON Huimin Wang, Xingyu Tong, Runming Shi, Sifei Wang, Jun Yu, Jianli Chen
2021	—	`conf`	CongestNN: An Bi-Directional Congestion Prediction Framework for Large-Scale Heterogeneous FPGAs. ASICON Chenyue Ma, Yifeng Xiao, Sifei Wang, Jun Yu, Jianli Chen
2021	A*	`conf`	Late Breaking Results: An Effective Legalization Algorithm for Heterogeneous FPGAs with Complex Constraints. DAC Zhipeng Huang, Haokai Sun, Huimin Wang, Ziran Zhu, Jun Yu, Jianli Chen
2021	A*	`conf`	Late Breaking Results: Incremental 3D Global Routing Considering Cell Movement. DAC Peng Zou, Zhifeng Lin, Chenyue Ma, Jun Yu, Jianli Chen
2021	A*	`conf`	Late Breaking Results: Novel Discrete Dynamic Filled Function Algorithm for Acyclic Graph Partitioning. DAC Jianli Chen, Jiarui Chen, Xiao Shi, Lichong Sun, Jun Yu
2021	A*	`conf`	Low-Cost Lithography Hotspot Detection with Active Entropy Sampling and Model Calibration. DAC Yifeng Xiao, Miaodi Su, Haoyu Yang, Jianli Chen, Jun Yu, Bei Yu
2021	—	`conf`	Simulation of SEU Response of Advanced 20 nm FDSOI SRAMs. ASICON Chang Cai, Luchang Ding, Ze He, Jian Yu, Jie Liu, Jiyuan Bai, Gengsheng Chen, Jun Yu
2021	A	`conf`	Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints. DATE Zhifeng Lin, Yanyue Xie, Gang Qian, Jianli Chen, Sifei Wang, Jun Yu, Yao-Wen Chang
2020	A*	`conf`	An Efficient EPIST Algorithm for Global Placement with Non-Integer Multiple-Height Cells DAC Jianli Chen, Zhipeng Huang, Ye Huang, Wenxing Zhu, Jun Yu, Yao-Wen Chang
2020	A*	`conf`	Late Breaking Results: An Analytical Timing-Driven Placer for Heterogeneous FPGAs DAC Zhifeng Lin, Yanyue Xie, Gang Qian, Sifei Wang, Jun Yu, Jianli Chen
2020	A*	`conf`	Time-Division Multiplexing Based System-Level FPGA Routing for Logic Verification. DAC Peng Zou, Zhifeng Lin, Xiao Shi, Yingjie Wu, Jianli Chen, Jun Yu, Yao-Wen Chang
2019	C	`conf`	A Horizontal Attack on SM9 Signature Generation. CIS Weijun Shan, Jun Yu, Limin Guo, Kun Jiang, Lihui Wang, Qing Li
2019	A	`conf`	Analytical Placement with 3D Poisson's Equation and ADMM Based Optimization for Large-Scale 2.5D Heterogeneous FPGAs. ICCAD Jianli Chen, Wenxing Zhu, Jun Yu, Lei He, Yao-Wen Chang
2019	J	`jnl`	Design and verification of universal evaluation system for single event effect sensitivity measurement in very-large-scale integrated circuits. IEICE Electron. Express Liewei Xu, Chang Cai, Tianqi Liu, Lingyun Ke, Jun Yu, Chang Wu
2019	A	`conf`	Timing-Aware Fill Insertions with Design-Rule and Density Constraints. ICCAD Tingshen Lan, Xingquan Li, Jianli Chen, Jun Yu, Lei He, Senhua Dong, Wenxing Zhu, Yao-Wen Chang
2018	J	`jnl`	A Survey on Energy Internet: Architecture, Approach, and Emerging Technologies. IEEE Syst. J. Kun Wang, Jun Yu, Yan Yu, Yirou Qian, Deze Zeng, Song Guo, Yong Xiang, Jinsong Wu
2015	C	`conf`	A Chosen - Plaintext Differential Power Analysis Attack on HMAC - SM3. CIS Limin Guo, Lihui Wang, Dan Liu, Weijun Shan, Zhimin Zhang, Qing Li, Jun Yu
2015	C	`conf`	A New SPA Attack on ECC with Regular Point Multiplication. CIS Lihui Wang, Qing Li, Gang Zhang, Jun Yu, Zhimin Zhang, Limin Guo, David Wei Zhang
2015	C	`conf`	Differential Power Analysis on Dynamic Password Token Based on SM3 Algorithm, and Countermeasures. CIS Limin Guo, Lihui Wang, Qing Li, Jun Yu, Peng Luo