Jun Sawada

27 papers A* 2A 2B 7Journal 7Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Scalable NorthPole System with End-to-End Vertical Integration for Low-Latency and Energy-Efficient LLM Inference.
CoRR
Michael V. DeBole, Rathinakumar Appuswamy, Neil McGlohon, Brian Taba, Steven K. Esser, Filipp Akopyan, John V. Arthur, Arnon Amir, Alexander Andreopoulos, Peter J. Carlson, Andrew S. Cassidy, Pallab Datta, Myron D. Flickner, Rajamohan Gandhasri, Guillaume J. Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Tapan K. Nayak, Carlos Ortega Otero, Hartmut Penner, William P. Risk, Jun Sawada, Jay Sivagnaname, Daniel F. Smith, Rafael Sousa, Ignacio Terrizzano, Takanori Ueda, Trent Gray-Donald, David D. Cox, Dharmendra S. Modha
2025 — conf
The NorthPole Validator: A Cycle-Accurate Simulator for HW/SW Codesign of a Prescheduled Neural Inference Accelerator.
HPEC
Alexander Andreopoulos, Michael V. DeBole, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Tapan K. Nayak, Daniel F. Smith, Brian Taba, Filipp Akopyan, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Carlos Ortega Otero, William P. Risk, Jun Sawada, Myron D. Flickner, Dharmendra S. Modha
2024 — conf
11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm Chip.
ISSCC
Andrew S. Cassidy, John V. Arthur, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha
2024 — conf
Breakthrough Edge AI Inference Performance Using Northpole in 3U Vpx Form Factor.
HPEC
Filipp Akopyan, William P. Risk, John V. Arthur, Andrew S. Cassidy, Michael V. DeBole, Carlos Ortega Otero, Jun Sawada, Evan Colgan, Michael E. Criscolo, Phillip V. Mann, Heinz Baier, Kai Schleupen, Arnon Amir, Alexander Andreopoulos, Rathinakumar Appuswamy, Deepika Bablani, Peter J. Carlson, Pallab Datta, Steven K. Esser, Myron D. Flickner, Rajamohan Gandhasri, Guillaume J. Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Neil McGlohon, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, Jay Sivagnaname, Daniel F. Smith, Rafael Sousa, Brian Taba, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha
2024 — conf
Breakthrough Low-Latency, High-Energy-Efficiency LLM Inference Performance Using NorthPole.
HPEC
Rathinakumar Appuswamy, Michael V. DeBole, Brian Taba, Steven K. Esser, Andrew S. Cassidy, Arnon Amir, Alexander Andreopoulos, Deepika Bablani, Pallab Datta, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Neil McGlohon, Jeffrey L. McKinstry, Tapan K. Nayak, Daniel F. Smith, Rafael Sousa, Ignacio Terrizzano, Filipp Akopyan, Peter J. Carlson, Rajamohan Gandhasri, Guillaume Garreau, Nelson M. Gonzalez, Megumi Ito, Jennifer L. Klamo, Yutaka Y. Nakamura, Carlos Ortega Otero, William P. Risk, Jun Sawada, Kai Schleupen, Jay Sivagnaname, Matthew Stallone, Takanori Ueda, Myron D. Flickner, John V. Arthur, Rameswar Panda, David D. Cox, Dharmendra S. Modha
2023 — conf
IBM NorthPole Neural Inference Machine.
HCS
Dharmendra S. Modha, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda
2019 — conf
The Ambiguity of Tense in the Japanese Mirative Sentence with Nante/Towa.
JSAI-isAI Workshops
Osamu Sawada, Jun Sawada
2019 J jnl
TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years.
Computer
Michael V. DeBole, Brian Taba, Arnon Amir, Filipp Akopyan, Alexander Andreopoulos, William P. Risk, Jeff Kusnitz, Carlos Ortega Otero, Tapan K. Nayak, Rathinakumar Appuswamy, Peter J. Carlson, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Guillaume Garreau, Kevin L. Holland, Scott Lekuch, Michael Mastro, Jeffrey L. McKinstry, Carmelo di Nolfo, Brent Paulovicks, Jun Sawada, Kai Schleupen, Benjamin G. Shaw, Jennifer L. Klamo, Myron D. Flickner, John V. Arthur, Dharmendra S. Modha
2016 A conf
Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications.
SC
Jun Sawada, Filipp Akopyan, Andrew S. Cassidy, Brian Taba, Michael V. DeBole, Pallab Datta, Rodrigo Alvarez-Icaza, Arnon Amir, John V. Arthur, Alexander Andreopoulos, Rathinakumar Appuswamy, Heinz Baier, Davis Barch, David J. Berg, Carmelo di Nolfo, Steven K. Esser, Myron Flickner, Thomas A. Horvath, Bryan L. Jackson, Jeff Kusnitz, Scott Lekuch, Michael Mastro, Timothy Melano, Paul A. Merolla, Steven E. Millman, Tapan K. Nayak, Norm Pass, Hartmut E. Penner, William P. Risk, Kai Schleupen, Benjamin G. Shaw, Hayley Wu, Brian Giera, Adam T. Moody, T. Nathan Mundhenk, Brian Van Essen, Eric X. Wang, David P. Widemann, Qing Wu, William E. Murphy, Jamie K. Infantolino, James A. Ross, Dale R. Shires, Manuel M. Vindiola, Raju Namburu, Dharmendra S. Modha
2015 J jnl
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha
2014 A conf
Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution.
SC
Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha
2013 B conf
Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores.
IJCNN
Andrew S. Cassidy, Paul Merolla, John V. Arthur, Steven K. Esser, Bryan L. Jackson, Rodrigo Alvarez-Icaza, Pallab Datta, Jun Sawada, Theodore M. Wong, Vitaly Feldman, Arnon Amir, Daniel Ben Dayan Rubin, Filipp Akopyan, Emmett McQuinn, William P. Risk, Dharmendra S. Modha
2013 — conf
SyNAPSE: Jun Sawada.
ACSD
Jun Sawada, Dharmendra S. Modha
2011 B conf
Hybrid verification of a hardware modular reduction engine.
FMCAD
Jun Sawada, Peter Sandon, Viresh Paruthi, Jason Baumgartner, Michael L. Case, Hari Mony
2010 B conf
Automatic verification of estimate functions with polynomials of bounded functions.
FMCAD
Jun Sawada
2009 B conf
Scalable conditional equivalence checking: An automated invariant-generation based approach.
FMCAD
Jason Baumgartner, Hari Mony, Michael L. Case, Jun Sawada, Karen Yorav
2006 B conf
ACL2SIX: A Hint used to Integrate a Theorem Prover and an Automated Verification Tool.
FMCAD
Jun Sawada, Erik Reeber
2006 — conf
Combining ACL2 and an automated verification tool to verify a multiplier.
ACL2
Erik Reeber, Jun Sawada
2006 J jnl
Limited switch dynamic logic circuits for high-speed low-power circuit design.
IBM J. Res. Dev.
Wendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada
2002 B conf
Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem.
FMCAD
Jun Sawada, Ruben Gamboa
2002 J jnl
Verification of FM9801: An Out-of-Order Microprocessor Model with Speculative Execution, Exceptions, and Program-Modifying Capability.
Formal Methods Syst. Des.
Jun Sawada, Warren A. Hunt Jr.
2001 J jnl
Derivation of a rotator circuit with homogeneous interconnect.
Inf. Process. Lett.
H. Peter Hofstee, Jun Sawada
2000 B conf
Hardware Modeling Using Function Encapsulation.
FMCAD
Jun Sawada, Warren A. Hunt Jr.
1999 — conf
Results of the Verification of a Complex Pipelined Machine Model.
CHARME
Jun Sawada, Warren A. Hunt Jr.
1999 J jnl
Verifying the FM9801 microarchitecture.
IEEE Micro
Warren A. Hunt Jr., Jun Sawada
1998 A* conf
Processor Verification with Precise Exeptions and Speculative Execution.
CAV
Jun Sawada, Warren A. Hunt Jr.
1997 A* conf
Trace Table Based Approach for Pipeline Microprocessor Verification.
CAV
Jun Sawada, Warren A. Hunt Jr.