Jun-Hong Chen

21 papers C 5Journal 11Unranked 5
YearRankTypeTitle / Venue / Authors
2023 J jnl
Establishment of extensive artificial intelligence models for kinase inhibitor prediction: Identification of novel PDGFRB inhibitors.
Comput. Biol. Medicine
Ssu-Ting Lien, Tony Eight Lin, Jui-Hua Hsieh, Tzu-Ying Sung, Jun-Hong Chen, Kai-Cheng Hsu
2022 J jnl
Discovering a trans-omics biomarker signature that predisposes high risk diabetic patients to diabetic kidney disease.
npj Digit. Medicine
I-Wen Wu, Tsung-Hsien Tsai, Chi-Jen Lo, Yi-Ju Chou, Chi-Hsiao Yeh, Yun-Hsuan Chan, Jun-Hong Chen, Paul Wei-Che Hsu, Heng-Chih Pan, Heng-Jung Hsu, Chun-Yu Chen, Chin-Chan Lee, Yu-Chiau Shyu, Chih-Lang Lin, Mei-Ling Cheng, Chi-Chun Lai, Huey-Kang Sytwu, Ting-Fen Tsai
2020 J jnl
Animated Character Style Investigation with Decision Tree Classification.
Symmetry
Kun Liu, Kang-Ming Chang, Ying-Ju Liu, Jun-Hong Chen
2019 J jnl
A Study of Facial Features of American and Japanese Cartoon Characters.
Symmetry
Kun Liu, Jun-Hong Chen, Kang-Ming Chang
2017 — conf
Freeway Travel Time Prediction by Using the GA-Based Hammerstein Recurrent Neural Network.
ICGEC
Ru-Kam Lee, Yi-Che Yang, Jun-Hong Chen, Yi-Chung Chen
2017 J jnl
SheddomeDB: the ectodomain shedding database for membrane-bound shed markers.
BMC Bioinform.
Wei-Sheng Tien, Jun-Hong Chen, Kun-Pin Wu
2010 J jnl
A High-Performance Unified-Field Reconfigurable Cryptographic Processor.
IEEE Trans. Very Large Scale Integr. Syst.
Jun-Hong Chen, Ming-Der Shieh, Wen-Ching Lin
2009 J jnl
A New Algorithm for High-Speed Modular Multiplication Design.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu
2009 J jnl
An Efficient Multiplier/Divider Design for Elliptic Curve Cryptosystem over GF(2m).
J. Inf. Sci. Eng.
Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Chien-Ming Wu
2008 J jnl
A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem.
IEEE Trans. Very Large Scale Integr. Syst.
Ming-Der Shieh, Jun-Hong Chen, Hao-Hsuan Wu, Wen-Ching Lin
2008 C conf
A new look-up table-based multiplier/squarer design for cryptosystems over GF(2
ISCAS
Wen-Ching Lin, Jun-Hong Chen, Ming-Der Shieh
2008 — conf
Exploration of Low-Cost Configurable S-Box Designs for AES Applications.
ICESS
Jun-Hong Chen, Sue-Jing Huang, Wen-Ching Lin, Yung-Kuei Lu, Ming-Der Shieh
2008 C conf
High-speed modular multiplication design for public-key cryptosystems.
ISCAS
Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu, Ming-Der Shieh
2007 C conf
A New Montgomery Modular Multiplication Algorithm and its VLSI Design for RSA Cryptosystem.
ISCAS
Jun-Hong Chen, Haw-Shiuan Wu, Ming-Der Shieh, Wen-Ching Lin
2006 — conf
Asynchronous Design of Modular Multiplication Using Adaptive Radix Computation.
APCCAS
Jun-Hong Chen, Ming-Der Shieh, Haw-Shiuan Wu, Wen-Ching Lin
2006 C conf
Design and implementation of efficient Reed-Solomon decoders for multi-mode applications.
ISCAS
Ming-Der Shieh, Yung-Kuei Lu, Shen-Ming Chung, Jun-Hong Chen
2006 J jnl
High-Speed Design of Montgomery Inverse Algorithm over GF(2
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Ming-Der Shieh, Jun-Hong Chen, Chien-Ming Wu
2006 C conf
High-speed CRC design for 10 Gbps applications.
ISCAS
Jing-Shiun Lin, Chung-Kung Lee, Ming-Der Shieh, Jun-Hong Chen
2005 — conf
Concurrent algorithm for high-speed point multiplication in elliptic curve cryptography.
ISCAS (5)
Jun-Hong Chen, Ming-Der Shieh, Chien-Ming Wu
2005 J jnl
VLSI architectural design tradeoffs for sliding-window log-MAP decoders.
IEEE Trans. Very Large Scale Integr. Syst.
Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen
2004 — conf
VLSI architecture exploration for sliding-window Log-MAP decoders.
ISCAS (2)
Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen, Hsin-Fu Lo