Jun-Ho Choy

14 papers A 2Journal 3Unranked 9
YearRankTypeTitle / Venue / Authors
2025 — conf
A Physics-Based Electromigration Assessment of Analog Circuits.
IRPS
Jun-Ho Choy, Armen Kteyan, R. Kang, S. Jo, Valeriy Sukharev, S. Choi, J. Passage, I. Kühn, Markus Herklotz, M. Gall
2024 — conf
A Novel Method for the Determination of Electromigration-Induced Void Nucleation Stresses.
IRPS
J. Shuster-Passage, S. Abdel Razek, M. Mattoo, Meike Hauschildt, Seungman Choi, Martin Gall, Armen Kteyan, Jun-Ho Choy, Valeriy Sukharev, Matthias Kraatz, J. R. Lloyd
2024 — conf
A Unified Physics-Based Stochastic Model for EM-Induced Resistance Degradation in BEoL Interconnect Segments.
IRPS
Valeriy Sukharev, Jun-Ho Choy, Armen Kteyan, J. Shuster-Passage, Seungman Choi, Martin Gall
2024 — conf
Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction Effects.
ISPD
Jun-Ho Choy, Stéphane Moreau, Catherine Brunet-Manquat, Valeriy Sukharev, Armen Kteyan
2023 — conf
Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution.
ISPD
Armen Kteyan, Valeriy Sukharev, Alexander Volkov, Jun-Ho Choy, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Stéphane Moreau
2022 J jnl
Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Valeriy Sukharev, Armen Kteyan, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Jun-Ho Choy, Sofya Torosyan, Yu Zhu
2022 — conf
Novel Methodology for Assessing Chip-Package Interaction Effects onChip Performance.
ISPD
Armen Kteyan, Jun-Ho Choy, Valeriy Sukharev, Massimo Bertoletti, Carmelo Maiorca, Rossana Zadra, Massimo Inzaghi, Gabriele Gattere, Giancarlo Zinco, Paolo Valente, Roberto Bardelli, Alessandro Valerio, Pierluigi Rolandi, Mattia Monetti, Valentina Cuomo, Salvatore Santapa
2019 — conf
An Accurate Assessment of Chip-Package Interaction is a Key Factor for Designing Resilient 3D IC Systems.
3DIC
Valeriy Sukharev, Armen Kteyan, Jun-Ho Choy
2019 — conf
Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages.
IRPS
Armen Kteyan, Henrik Hovsepyan, Jun-Ho Choy, Valeriy Sukharev
2016 J jnl
Electromigration assessment for power grid networks considering temperature and thermal stress effects.
Integr.
Xin Huang, Valeriy Sukharev, Jun-Ho Choy, Marko Chew, Taeyoung Kim, Sheldon X.-D. Tan
2015 A conf
Post placement leakage reduction with stress-enhanced filler cells.
ISLPED
Jun-Ho Choy, Valeriy Sukharev, Armen Kteyan, Henrik Hovsepyan, Ramnath Venkatraman, Ruggero Castagnetti
2014 A conf
Accurate full-chip estimation of power map, current densities and temperature for EM assessment.
ICCAD
Marko Chew, Ara Aslyan, Jun-Ho Choy, Xin Huang
2012 J jnl
Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance.
J. Electron. Test.
Valeriy Sukharev, Armen Kteyan, Jun-Ho Choy, Henrik Hovsepyan, Ara Markosian, Ehrenfried Zschech, Rene Huebner
2009 — conf
Control of design specific variation in etch-assisted via pattern transfer by means of full-chip simulation.
ISQED
Valeriy Sukharev, Ara Markosian, Armen Kteyan, Levon Manukyan, Nikolay Khachatryan, Jun-Ho Choy, Hasmik Lazaryan, Henrik Hovsepyan, Seiji Onoue, Takuo Kikuchi, Tetsuya Kamigaki