Julian Oppermann

30 papers A* 1A 3B 5C 1Misc 2Journal 4Unranked 12

Year	Rank	Type	Title / Venue / Authors
2024	A	`conf`	Experiences Building an MLIR-Based SYCL Compiler. CGO Ettore Tiotto, Victor Perez, Whitney Tsang, Lukas Sommer, Julian Oppermann, Victor Lomüller, Mehdi Goli, James Brodman
2024	—	`conf`	Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language. ASPLOS (3) Julian Oppermann, Brindusa Mihaela Damian-Kosterhon, Florian Meisel, Tammo Mürmann, Eyck Jentzsch, Andreas Koch
2024	—	`conf`	On Demand Specialization of SYCL Kernels with Specialization Constant Length Allocations (SCLA). IWOCL Victor Perez, Victor Lomüller, Lukas Sommer, Julian Oppermann, Romain Biessy, Tadej Ciglaric, Mehdi Goli
2024	—	`conf`	Runtime Instantiation of Kernels for Fast Fourier Transforms Using SYCL Specialization Constants. Euro-Par Workshops (1) Victor Perez, Victor Lomüller, Lukas Sommer, Julian Oppermann, Romain Biessy, Tadej Ciglaric, Mehdi Goli
2023	—	`conf`	Altis-SYCL: Migrating Altis Benchmarking Suite from CUDA to SYCL for GPUs and FPGAs. SC Workshops Christoph Weckert, Leonardo Solis-Vasquez, Julian Oppermann, Andreas Koch, Oliver Sinnen
2023	J	`jnl`	Experiences Building an MLIR-based SYCL Compiler. CoRR Ettore Tiotto, Victor Perez, Whitney Tsang, Lukas Sommer, Julian Oppermann, Victor Lomüller, Mehdi Goli, James Brodman
2022	A*	`conf`	SCAIE-V: an open-source SCAlable interface for ISA extensions for RISC-V processors. DAC Mihaela Damian, Julian Oppermann, Christoph Spang, Andreas Koch
2022	A	`conf`	The Scale4Edge RISC-V Ecosystem. DATE Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz
2021	—	`conf`	Efficient Operator Sharing Modulo Scheduling for Sum-Product Network Inference on FPGAs. SAMOS Hanna Kruppe, Lukas Sommer, Lukas Weber, Julian Oppermann, Cristian Axenie, Andreas Koch
2019	—	`ch.`	Active Storage. Encyclopedia of Big Data Technologies Ilia Petrov, Tobias Vinçon, Andreas Koch, Julian Oppermann, Sergey Hardock, Christian Riegger
2019	—	`—`	Advances in ILP-based Modulo Scheduling for High-Level Synthesis. Julian Oppermann
2019	—	`conf`	Design-Space Exploration with Multi-Objective Resource-Aware Modulo Scheduling. Euro-Par Julian Oppermann, Patrick Sittel, Martin Kumm, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen
2019	J	`jnl`	Exact and Practical Modulo Scheduling for High-Level Synthesis. ACM Trans. Reconfigurable Technol. Syst. Julian Oppermann, Melanie Reuter-Oppermann, Lukas Sommer, Andreas Koch, Oliver Sinnen
2019	A	`conf`	Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language. CGO Robin Kruppe, Julian Oppermann, Lukas Sommer, Andreas Koch
2019	—	`conf`	Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs. FPT Lukas Weber, Lukas Sommer, Julian Oppermann, Alejandro Molina, Kristian Kersting, Andreas Koch
2019	—	`conf`	SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis. FPT Julian Oppermann, Lukas Sommer, Lukas Weber, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen
2019	J	`jnl`	SpExSim: assessing kernel suitability for C-based high-level hardware synthesis. J. Supercomput. Julian Oppermann, Lukas Sommer, Andreas Koch
2018	C	`conf`	Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. ICCD Lukas Sommer, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, Andreas Koch
2018	B	`conf`	Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-Level Synthesis. FPL Julian Oppermann, Melanie Reuter-Oppermann, Lukas Sommer, Oliver Sinnen, Andreas Koch
2018	Misc	`conf`	GeMS: a generator for modulo scheduling problems: work in progress. CASES Julian Oppermann, Sebastian Vollbrecht, Melanie Reuter-Oppermann, Oliver Sinnen, Andreas Koch
2018	B	`conf`	ILP-Based Modulo Scheduling and Binding for Register Minimization. FPL Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch
2018	—	`conf`	Improved High-Level Synthesis for Complex CellML Models. ARC Björn Liebig, Julian Oppermann, Oliver Sinnen, Andreas Koch
2018	B	`conf`	NoFTL-KV: TacklingWrite-Amplification on KV-Stores with Native Storage Management. EDBT Tobias Vinçon, Sergej Hardock, Christian Riegger, Julian Oppermann, Andreas Koch, Ilia Petrov
2017	—	`conf`	Synthesis of interleaved multithreaded accelerators from OpenMP loops. ReConFig Lukas Sommer, Julian Oppermann, Jaco A. Hofmann, Andreas Koch
2016	—	`conf`	Detecting Kernels Suitable for C-Based High-Level Hardware Synthesis. UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld Julian Oppermann, Andreas Koch
2016	Misc	`conf`	ILP-based modulo scheduling for high-level synthesis. CASES Julian Oppermann, Andreas Koch, Melanie Reuter-Oppermann, Oliver Sinnen
2016	J	`jnl`	Performance optimisation strategies for automatically generated FPGA accelerators for biomedical models. Concurr. Comput. Pract. Exp. Ting Yu, Julian Oppermann, Chris P. Bradley, Oliver Sinnen
2015	B	`conf`	Domain-specific optimisation for the high-level synthesis of CellML-based simulation accelerators. FPL Julian Oppermann, Andreas Koch, Ting Yu, Oliver Sinnen
2014	B	`conf`	Automatic high-level synthesis of multi-threaded hardware accelerators. FPL Jens Huthmann, Julian Oppermann, Andreas Koch
2013	—	`conf`	Hardware/software co-compilation with the Nymble system. ReCoSoC Jens Huthmann, Björn Liebig, Julian Oppermann, Andreas Koch