Jude Angelo Ambrose

46 papers A* 3A 7C 7Misc 7Journal 9Unranked 11

Year	Rank	Type	Title / Venue / Authors
2021	J	`jnl`	QuadSeal: Quadruple Balancing to Mitigate Power Analysis Attacks with Variability Effects and Electromagnetic Fault Injection Attacks. ACM Trans. Design Autom. Electr. Syst. Darshana Jayasinghe, Aleksandar Ignjatovic, Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran
2017	J	`jnl`	Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors. IEEE Trans. Computers Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
2016	J	`jnl`	Processor Design for Soft Errors: Challenges and State of the Art. ACM Comput. Surv. Tuo Li, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
2016	A	`conf`	RECORD: Reducing register traffic for checkpointing in embedded processors. DATE Tuo Li, Jude Angelo Ambrose, Sri Parameswaran
2015	—	`conf`	ADAPT: An adaptive manycore methodology for software pipelined applications. ASP-DAC Xi Zhang, Haris Javaid, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
2015	C	`conf`	ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip. ISCAS Jude Angelo Ambrose, Nick Higgins, Mrinal Chakravarthy, Shivam Gargg, Tuo Li, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran
2015	Misc	`conf`	ARGUS: A Framework for Rapid Design and Prototype of Heterogeneous Multicore Systems in FPGA. VLSID Jude Angelo Ambrose, Tuo Li, Daniel Murphy, Shivam Gargg, Nick Higgins, Sri Parameswaran
2015	A	`conf`	Dynamic reconfigurable puncturing for secure wireless communication. DATE Liang Tang, Jude Angelo Ambrose, Akash Kumar, Sri Parameswaran
2015	Misc	`conf`	QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks. CASES Darshana Jayasinghe, Aleksandar Ignjatovic, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
2015	J	`jnl`	SecureD: A Secure Dual Core Embedded Processor. CoRR Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran
2015	C	`conf`	Sequential C-code to distributed pipelined heterogeneous MPSoC synthesis for streaming applications. ICCD Jude Angelo Ambrose, Yusuke Yachide, Kapil Batra, Jorgen Peddersen, Sri Parameswaran
2015	—	`conf`	Side channel attacks in embedded systems: A tale of hostilities and deterrence. ISQED Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li, Sri Parameswaran
2014	C	`conf`	Advanced modes in AES: Are they safe from power analysis based side channel attacks? ICCD Darshana Jayasinghe, Roshan G. Ragel, Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran
2014	—	`conf`	Improving GA-Based NoC Mapping Algorithms Using a Formal Model. ISVLSI Vinitha Arakkonam Palaniveloo, Jude Angelo Ambrose, Arcot Sowmya
2014	J	`jnl`	Instruction-set Selection for Multi-application based ASIP Design: An Instruction-level Study. CoRR Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose
2014	C	`conf`	Method for designing multi-channel RNS architectures to prevent power analysis SCA. ISCAS Héctor Pettenghi, Jude Angelo Ambrose, Ricardo Chaves, Leonel Sousa
2014	—	`conf`	Reconfigurable Convolutional Codec for Physical Layer Communication Security Application. MILCOM Liang Tang, Jude Angelo Ambrose, Sri Parameswaran, Sha Zhu
2014	—	`conf`	SDG2KPN: System Dependency Graph to function-level KPN generation of legacy code for MPSoCs. ASP-DAC Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran, Alvin Labios, Yusuke Yachide
2013	Misc	`conf`	A Study on Instruction-set Selection Using Multi-application Based Application Specific Instruction-set Processors. VLSI Design Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose, Sri Parameswaran
2013	—	`conf`	A double-width algorithmic balancing to prevent power analysis Side Channel Attacks in AES. ISVLSI Ankita Arora, Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran
2013	A	`conf`	CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors. DATE Tuo Li, Muhammad Shafique, Semeen Rehman, Swarnalatha Radhakrishnan, Roshan G. Ragel, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
2013	—	`conf`	DARNS: A randomized multi-modulo RNS architecture for double-and-add in ECC to prevent power analysis side channel attacks. ASP-DAC Jude Angelo Ambrose, Héctor Pettenghi, Leonel Sousa
2013	A	`conf`	DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems. ICCAD Tuo Li, Muhammad Shafique, Semeen Rehman, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
2013	—	`conf`	DRMA: dynamically reconfigurable MPSoC architecture. ACM Great Lakes Symposium on VLSI Lawrance Zhang, Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran, Roshan G. Ragel, Swarnalatha Radhakrishnan, Kewal K. Saluja
2013	C	`conf`	Latency-constrained binding of data flow graphs to energy conscious GALS-based MPSoCs. ISCAS Jude Angelo Ambrose, Isuru Nawinne, Sri Parameswaran
2013	Misc	`conf`	MAPro: A Tiny Processor for Reconfigurable Baseband Modulation Mapping. VLSI Design Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
2013	A*	`conf`	RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors. DAC Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Semeen Rehman, Jörg Henkel, Sri Parameswaran
2013	J	`jnl`	Randomised multi-modulo residue number system architecture for double-and-add to prevent power analysis side channel attacks. IET Circuits Devices Syst. Jude Angelo Ambrose, Héctor Pettenghi, Darshana Jayasinghe, Leonel Sousa
2013	A*	`conf`	Reconfigurable pipelined coprocessor for multi-mode communication transmission. DAC Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
2013	C	`conf`	Variable increment step based reconfigurable interleaver for multimode communication application. ISCAS Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
2012	A	`conf`	A TDM NoC supporting QoS, multicast, and fast connection set-up. DATE Radu Andrei Stefan, Anca Mariana Molnos, Jude Angelo Ambrose, Kees Goossens
2012	C	`conf`	CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study. ISCAS Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran
2012	Misc	`conf`	DIMSim: a rapid two-level cache simulation approach for deadline-based MPSoCs. CODES+ISSS Mohammad Shihabul Haque, Roshan G. Ragel, Jude Angelo Ambrose, Swarnalatha Radhakrishnan, Sri Parameswaran
2012	—	`conf`	Efficient implementation of multi-moduli architectures for Binary-to-RNS conversion. ASP-DAC Héctor Pettenghi, Leonel Sousa, Jude Angelo Ambrose
2012	A	`conf`	Fine-grained hardware/software methodology for process migration in MPSoCs. ICCAD Tuo Li, Jude Angelo Ambrose, Sri Parameswaran
2012	J	`jnl`	Randomized Instruction Injection to Counter Power Analysis Attacks. ACM Trans. Embed. Comput. Syst. Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
2011	—	`ch.`	Composability and Predictability for Independent Application Development, Verification, and Execution. Multiprocessor System-on-Chip Benny Akesson, Anca Mariana Molnos, Andreas Hansson, Jude Angelo Ambrose, Kees Goossens
2011	—	`conf`	Composable local memory organisation for streaming applications on embedded MPSoCs. Conf. Computing Frontiers Jude Angelo Ambrose, Anca Mariana Molnos, Andrew Nelson, Sorin Cotofana, Kees Goossens, Ben H. H. Juurlink
2011	J	`jnl`	Design and implementation of an operating system for composable processor sharing. Microprocess. Microsystems Andreas Hansson, Marcus Ekerhult, Anca Mariana Molnos, Aleksandar Milutinovic, Andrew Nelson, Jude Angelo Ambrose, Kees Goossens
2011	J	`jnl`	Multiprocessor information concealment architecture to prevent power analysis-based side channel attacks. IET Comput. Digit. Tech. Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran, Aleksandar Ignjatovic
2010	—	`conf`	RACE: A Rapid, ArChitectural Simulation and Synthesis Framework for Embedded Processors. DIPES/BICC Roshan G. Ragel, Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran
2009	—	`—`	Power analysis side channel attacks: the processor design-level context. Jude Angelo Ambrose
2008	Misc	`conf`	Anatomy of Differential Power Analysis for AES. SYNASC Jude Angelo Ambrose, Naeill Aldon, Aleksandar Ignjatovic, Sri Parameswaran
2008	A	`conf`	MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm. ICCAD Jude Angelo Ambrose, Sri Parameswaran, Aleksandar Ignjatovic
2007	Misc	`conf`	A smart random code injection to mask power analysis based side channel attacks. CODES+ISSS Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
2007	A*	`conf`	RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks. DAC Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran