Juan Salamanca

15 papers A 1C 2Journal 3Unranked 9
YearRankTypeTitle / Venue / Authors
2025 — conf
Parallelizing Irregular DOACROSS Loops Using ChatGPT and Transactional Memory in OpenMP.
IWOMP
Juan Salamanca, Alexandro Baldassin, Eduard Ayguadé, Lilian Berton, Islene Calciolari Garcia
2024 J jnl
Using hardware-transactional-memory support to implement speculative task execution.
J. Parallel Distributed Comput.
Juan Salamanca, Alexandro Baldassin
2023 J jnl
Evaluating the Performance of Speculative DOACROSS Loop Parallelization with taskloop.
CoRR
Juan Salamanca, Alexandro Baldassin
2023 — conf
How to Efficiently Parallelize Irregular DOACROSS Loops Using Fine Granularity and OpenMP Tasks: The SPEC mcf Case.
IWOMP
Juan Salamanca, Alexandro Baldassin
2022 C conf
Performance Comparison of Speculative Taskloop and OpenMP-for-Loop Thread-Level Speculation on Hardware Transactional Memory.
ISPDC
Juan Salamanca
2022 — conf
Using Off-the-Shelf Hardware Transactional Memory to Implement Speculative While in OpenMP.
IWOMP
Juan Salamanca, Alexandro Baldassin
2021 — conf
Improving Speculative taskloop in Hardware Transactional Memory.
IWOMP
Juan Salamanca, Alexandro Baldassin
2020 — conf
Using Hardware Transactional Memory to Implement Speculative Privatization in OpenMP.
LCPC
Juan Salamanca, Alexandro Baldassin
2019 — conf
A Proposal for Supporting Speculation in the OpenMP taskloop Construct.
IWOMP
Juan Salamanca, Alexandro Baldassin
2018 C conf
DOACROSS Parallelization Based on Component Annotation and Loop-Carried Probability.
SBAC-PAD
Luis Mattos, Divino Cesar S. Lucas, Juan Salamanca, Joao P. L. de Carvalho, Márcio Machado Pereira, Guido Araujo
2018 J jnl
Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation.
IEEE Trans. Parallel Distributed Syst.
Juan Salamanca, José Nelson Amaral, Guido Araujo
2017 — conf
Performance Evaluation of Thread-Level Speculation in Off-the-Shelf Hardware Transactional Memories.
Euro-Par
Juan Salamanca, José Nelson Amaral, Guido Araujo
2016 A conf
Evaluating and Improving Thread-Level Speculation in Hardware Transactional Memories.
IPDPS
Juan Salamanca, José Nelson Amaral, Guido Araujo
2015 — conf
Using Hardware Transactional Memory to Enable Speculative Trace Optimization.
SBAC-PAD (Workshops)
Juan Salamanca, José Nelson Amaral, Guido Araujo
2014 — conf
Loop-Carried Dependence Verification in OpenMP.
IWOMP
Juan Salamanca, Luis Mattos, Guido Araujo