Juan Lanchares

80 papers A 9B 4C 13Journal 26Unranked 24
YearRankTypeTitle / Venue / Authors
2025 J jnl
An LSTM-Based Neural Network Wearable System for Blood Glucose Prediction in People With Diabetes.
IEEE J. Biomed. Health Informatics
Felix Tena, Oscar Garnica, Juan Lanchares, J. Ignacio Hidalgo
2025 J jnl
Reverse-Engineering Optimization Techniques of High-Level Synthesis: Practical Insights Into Accelerating Applications With AMD-Xilinx Vitis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jorge Koronis, Oscar Garnica, J. Ignacio Hidalgo, Juan Lanchares
2024 J jnl
A methodology to automatically optimize dynamic memory managers applying grammatical evolution.
CoRR
José L. Risco-Martín, J. Manuel Colmenar, José Ignacio Hidalgo, Juan Lanchares, Josefa Díaz
2024 J jnl
Real Time Evolvable Hardware for Optimal Reconfiguration of Cusp-Like Pulse Shapers.
CoRR
Juan Lanchares, Oscar Garnica, José L. Risco-Martín, José Ignacio Hidalgo, J. Manuel Colmenar, Alfredo Cuesta-Infante
2023 — conf
Hardware design of a model generator based on grammars and cartesian genetic programming for blood glucose prediction.
GECCO Companion
Jorge Cano, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares
2023 J jnl
Optimizing L1 cache for embedded systems through grammatical evolution.
CoRR
Josefa Díaz Álvarez, J. Manuel Colmenar, José L. Risco-Martín, Juan Lanchares, Oscar Garnica
2021 J jnl
A Critical Review of the state-of-the-art on Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes.
CoRR
Felix Tena, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
2021 J jnl
Ensemble Models of Cutting-Edge Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes.
Sensors
Felix Tena, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
2020 J jnl
Glucose forecasting combining Markov chain based enrichment of data, random grammatical evolution and Bagging.
Appl. Soft Comput.
José Ignacio Hidalgo, Marta Botella, J. Manuel Velasco, Oscar Garnica, Carlos Cervigón, Remedios Martínez, Aranzazu Aramendi, Esther Maqueda, Juan Lanchares
2020 J jnl
Noise spectral analysis and error estimation of continuous glucose monitors under real-life conditions of diabetes patients.
Biomed. Signal Process. Control.
Oscar Garnica, Juan Lanchares, J. Manuel Velasco, José Ignacio Hidalgo, Marta Botella
2020 J jnl
Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs.
IEEE Trans. Very Large Scale Integr. Syst.
Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
2019 — conf
Can clustering improve glucose forecasting with genetic programming models?
GECCO (Companion)
Sergio Contador, José Ignacio Hidalgo, Oscar Garnica, J. Manuel Velasco, Juan Lanchares
2019 — conf
Determination of microscopic residual stresses using diffraction methods, EBSD maps, and evolutionary algorithms.
GECCO (Companion)
José Ignacio Hidalgo, Ricardo Fernández, Oscar Garnica, J. Manuel Colmenar, Juan Lanchares, Gaspar González-Doncel
2019 — conf
Determination of microscopic residual stresses using evolutionary algorithms.
GECCO (Companion)
José Ignacio Hidalgo, Ricardo Fernández, J. Manuel Colmenar, Oscar Garnica, Juan Lanchares, Gaspar González-Doncel
2018 J jnl
Combining data augmentation, EDAs and grammatical evolution for blood glucose forecasting.
Memetic Comput.
José Manuel Velasco, Oscar Garnica, Juan Lanchares, Marta Botella, José Ignacio Hidalgo
2018 — ch.
Identification of Models for Glucose Blood Values in Diabetics by Grammatical Evolution.
Handbook of Grammatical Evolution
José Ignacio Hidalgo, J. Manuel Colmenar, J. Manuel Velasco, Gabriel Kronberger, Stephan M. Winkler, Oscar Garnica, Juan Lanchares
2017 J jnl
Data Based Prediction of Blood Glucose Concentrations Using Evolutionary Methods.
J. Medical Syst.
José Ignacio Hidalgo, J. Manuel Colmenar, Gabriel Kronberger, Stephan M. Winkler, Oscar Garnica, Juan Lanchares
2017 B conf
Data augmentation and evolutionary algorithms to improve the prediction of blood glucose levels in scarcity of training data.
CEC
José Manuel Velasco, Oscar Garnica, Sergio Contador, Juan Lanchares, Esther Maqueda, Marta Botella, José Ignacio Hidalgo
2017 — conf
Enhancing Grammatical Evolution Through Data Augmentation: Application to Blood Glucose Forecasting.
EvoApplications (1)
José Manuel Velasco, Oscar Garnica, Sergio Contador, José Manuel Colmenar, Esther Maqueda, Marta Botella, Juan Lanchares, José Ignacio Hidalgo
2017 — conf
Forecasting glucose levels in patients with diabetes mellitus using semantic grammatical evolution and symbolic aggregate approximation.
GECCO (Companion)
José Manuel Velasco, Oscar Garnica, Sergio Contador, Marta Botella, Juan Lanchares, José Ignacio Hidalgo
2016 — conf
Compilable Phenotypes: Speeding-Up the Evaluation of Glucose Models in Grammatical Evolution.
EvoApplications (2)
J. Manuel Colmenar, José Ignacio Hidalgo, Juan Lanchares, Oscar Garnica, José L. Risco-Martín, Iván Contreras, Almudena Sánchez, J. Manuel Velasco
2016 J jnl
Optimizing L1 cache for embedded systems through grammatical evolution.
Soft Comput.
Josefa Díaz Álvarez, J. Manuel Colmenar, José L. Risco-Martín, Juan Lanchares, Oscar Garnica
2015 — conf
Data-Based Identification of Prediction Models for Glucose.
GECCO (Companion)
J. Manuel Velasco, Stephan M. Winkler, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares, J. Manuel Colmenar, Esther Maqueda, Marta Botella, José Antonio Rubio
2015 — conf
Optimizing Performance of L1 Cache Memory for Embedded Systems driven by Differential Evolution.
GECCO (Companion)
Josefa Díaz Álvarez, J. Manuel Colmenar, José L. Risco-Martín, Juan Lanchares, Oscar Garnica
2014 J jnl
A methodology to automatically optimize dynamic memory managers applying grammatical evolution.
J. Syst. Softw.
José L. Risco-Martín, J. Manuel Colmenar, José Ignacio Hidalgo, Juan Lanchares, Josefa Díaz
2014 — conf
Clarke and parkes error grid analysis of diabetic glucose models obtained with evolutionary computation.
GECCO (Companion)
José Ignacio Hidalgo, J. Manuel Colmenar, José Luis Risco-Martín, Esther Maqueda, Marta Botella, José Antonio Rubio, Alfredo Cuesta-Infante, Oscar Garnica, Juan Lanchares
2014 A conf
Solving GA-hard problems with EMMRS and GPGPUs.
GECCO
José Ignacio Hidalgo, J. Manuel Colmenar, José Luis Risco-Martín, Carlos Sánchez-Lacruz, Juan Lanchares, Oscar Garnica, Josefa Díaz
2013 J jnl
A review of bioinspired computer-aided design tools for hardware design.
Concurr. Comput. Pract. Exp.
Juan Lanchares, Oscar Garnica, Francisco Fernández de Vega, José Ignacio Hidalgo
2012 — ch.
Introduction.
Parallel Architectures and Bioinspired Algorithms
Francisco Fernández de Vega, José Ignacio Hidalgo, Juan Lanchares
2012 — book
Parallel Architectures and Bioinspired Algorithms
Francisco Fernández de Vega, José Ignacio Hidalgo Pérez, Juan Lanchares
2012 J jnl
Special issue on evolutionary computation on general purpose graphics processing units.
Soft Comput.
José L. Risco-Martín, Juan Lanchares, Carlos A. Coello Coello
2011 J jnl
A phase adaptive cache hierarchy for SMT processors.
Microprocess. Microsystems
Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo
2010 C conf
Adaptive Cache Memories for SMT Processors.
DSD
Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo
2010 A conf
Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution.
GECCO
José Manuel Colmenar, José L. Risco-Martín, David Atienza, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares
2010 J jnl
Parallel Architectures and Bioinspired Algorithms.
Parallel Comput.
José Ignacio Hidalgo, Francisco Fernández, Juan Lanchares, Erick Cantú-Paz, Albert Y. Zomaya
2010 — ch.
Parallel and Distributed Optimization of Dynamic Data Structures for Multimedia Embedded Systems.
Parallel and Distributed Computational Intelligence
José L. Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares
2010 — conf
Simulating a LAGS processor to consider variable latency on L1 D-Cache.
SummerSim
J. Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
2009 J jnl
Characterizing asynchronous variable latencies through probability distribution functions.
Microprocess. Microsystems
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
2009 A conf
Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems.
GECCO
José Luis Risco-Martín, José Ignacio Hidalgo, David Atienza, Juan Lanchares, Oscar Garnica
2009 J jnl
Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems.
J. Syst. Softw.
Christos Baloukas, José Luis Risco-Martín, David Atienza, Christophe Poucet, Lazaros Papadopoulos, Stylianos Mamagkakis, Dimitrios Soudris, José Ignacio Hidalgo, Francky Catthoor, Juan Lanchares
2008 J jnl
A parallel evolutionary algorithm to optimize dynamic data types in embedded systems.
Soft Comput.
José L. Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares
2008 A conf
Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems.
GECCO
José Ignacio Hidalgo, José L. Risco-Martín, David Atienza, Juan Lanchares
2008 C conf
Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization.
DSD
José Luis Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares
2008 C conf
Modelling Asynchronous Systems using Probability Distribution Functions.
PDP
José Manuel Colmenar, Noelia Morón, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo
2008 — conf
Optimization of dynamic data types in embedded systems using DEVS/SOA-based modeling and simulation.
Infoscale
José L. Risco-Martín, Saurabh Mittal, David Atienza, José Ignacio Hidalgo, Juan Lanchares
2008 J jnl
Particle swarm optimisation of memory usage in embedded systems.
Int. J. High Perform. Syst. Archit.
José L. Risco-Martín, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, David Atienza
2008 A conf
Solving discrete deceptive problems with EMMRS.
GECCO
José L. Risco-Martín, José Ignacio Hidalgo, Juan Lanchares, Oscar Garnica
2007 — conf
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches.
HiPEAC
Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares
2007 — conf
Is the island model fault tolerant?
GECCO (Companion)
José Ignacio Hidalgo, Juan Lanchares, Francisco Fernández de Vega, Daniel Lombraña Gonzalez
2007 A conf
Is the island model fault tolerant?
GECCO
José Ignacio Hidalgo, Francisco Fernández de Vega, Juan Lanchares, Daniel Lombraña Gonzalez
2007 C conf
Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation.
SCOPES
David Atienza, Christos Baloukas, Lazaros Papadopoulos, Christophe Poucet, Stylianos Mamagkakis, José Ignacio Hidalgo, Francky Catthoor, Dimitrios Soudris, Juan Lanchares
2007 B conf
Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors.
PACT
Sonia López, Steven G. Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares
2007 J jnl
Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders.
IET Comput. Digit. Tech.
Guadalupe Miñana, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar, Oscar Garnica, Sonia López
2006 C conf
A Power-Aware Technique for Functional Units in High-Performance Processors.
DSD
Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar
2006 — conf
A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors.
PATMOS
Guadalupe Miñana, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares, José Manuel Colmenar, Sonia López
2006 C conf
Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart.
DSD
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López
2006 — conf
Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions.
Euro-Par
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López
2005 — conf
Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width.
PATMOS
Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar
2004 J jnl
A methodology for reconfigurable hardware design based upon evolutionary computation.
Microprocess. Microsystems
Francisco Fernández, José Ignacio Hidalgo, Juan Lanchares, J. M. Sánchez
2004 J jnl
Annealing placement by thermodynamic combinatorial optimization.
ACM Trans. Design Autom. Electr. Syst.
Juan de Vicente, Juan Lanchares, Román Hermida
2004 C conf
Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays.
PDP
José Manuel Colmenar, Oscar Garnica, Sonia López, José Ignacio Hidalgo, Juan Lanchares, Román Hermida
2003 C conf
Hybrid Parallelization of a Compact Genetic Algorithm.
PDP
José Ignacio Hidalgo, Manuel Prieto, Juan Lanchares, Ranieri Baraglia, Francisco Tirado, Oscar Garnica
2003 A conf
Multi-FPGA Systems Synthesis by Means of Evolutionary Computation.
GECCO
José Ignacio Hidalgo, Francisco Fernández, Juan Lanchares, Juan Manuel Sánchez-Pérez, Román Hermida, Marco Tomassini, Ranieri Baraglia, Raffaele Perego, Oscar Garnica
2003 — conf
Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization.
PATMOS
Sonia López, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, Román Hermida
2002 C conf
A Hybrid Evolutionary Algorithm for Multi-FPGA Systems Design.
DSD
José Ignacio Hidalgo, Juan Lanchares, Aitor Ibarra, Román Hermida
2002 — conf
A New Methodology to Design Low-Power Asynchronous Circuits.
PATMOS
Oscar Garnica, Juan Lanchares, Román Hermida
2002 A conf
FPGA Placement by Thermodynamic Combinatorial Optimization.
DATE
Juan de Vicente, Juan Lanchares, Román Hermida
2002 J jnl
Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation.
Fundam. Informaticae
Oscar Garnica, Juan Lanchares, Román Hermida
2002 C conf
Optimization of Equational Specifications Using Genetic Techniques.
DSD
Aitor Ibarra, José M. Mendías, Juan Lanchares, José Ignacio Hidalgo, Román Hermida
2002 B conf
Transformation of Equational Specification by Means of Genetic Programming.
EuroGP
Aitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida
2001 C conf
A Parallel Compact Genetic Algorithm for Multi-FPGA Partitioning.
PDP
Ranieri Baraglia, Raffaele Perego, José Ignacio Hidalgo, Juan Lanchares, Francisco Tirado
2001 A conf
A pseudo delay-insensitive timing model to synthesizing low-power asynchronous circuits.
DATE
Oscar Garnica, Juan Lanchares, Román Hermida
2001 — conf
Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation.
ACSD
Oscar Garnica, Juan Lanchares, Román Hermida
2001 C conf
Pipelined Genetic Architecture with Fitness on the Fly.
DSD
Aitor Ibarra, Juan Lanchares, José Ignacio Hidalgo, F. Saenz
2000 C conf
Adaptive FPGA Placement by Natural Optimization.
IEEE International Workshop on Rapid System Prototyping
Juan de Vicente, Juan Lanchares, Román Hermida
2000 — conf
Partitioning and Placement for Multi-FPGA Systems Using Genetic Algorithms.
EUROMICRO
José Ignacio Hidalgo, Juan Lanchares, Román Hermida
1999 — conf
A Method for Model Parameter Identification Using Parallel Genetic Algorithms.
PVM/MPI
José Ignacio Hidalgo, Manuel Prieto, Juan Lanchares, Francisco Tirado, B. de Andrés, Segundo Esteban San Román, D. Rivera
1999 B conf
Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies.
FPL
Juan de Vicente, Juan Lanchares, Román Hermida
1998 — conf
RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing.
EUROMICRO
Juan de Vicente, Juan Lanchares, Román Hermida
1997 — conf
Functional Partitioning for Hardware-Software Codesign using Genetic Algorithms.
EUROMICRO
José Ignacio Hidalgo, Juan Lanchares