Juan Antonio Clemente

23 papers B 1Journal 17Unranked 5
YearRankTypeTitle / Venue / Authors
2024 J jnl
Non-intrusive study on FPGA of the SEU sensitivity on the COTS RISC-V VeeR EH1 soft processor from Western Digital.
Microprocess. Microsystems
Daniel León, Juan Carlos Fabero, Juan Antonio Clemente
2023 J jnl
SEE sensitivity of a COTS 28-nm SRAM-based FPGA under thermal neutrons and different incident angles.
Microprocess. Microsystems
Juan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Guillaume Hubert, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente
2022 J jnl
Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories.
IEEE Access
Golnaz Korkian, Daniel León, Francisco J. Franco, Juan Carlos Fabero, Manon Letiche, Yolanda Morilla, Pedro Martín-Holgado, Helmut Puchner, Hortensia Mecha, Juan Antonio Clemente
2021 — conf
Impact of DVS on Power Consumption and SEE Sensitivity of COTS Volatile SRAMs.
LATS
Mohammadreza Rezaei, Francisco J. Franco, Juan Carlos Fabero, Hortensia Mecha, Helmut Puchner, Juan Antonio Clemente
2021 — conf
Thermal Neutron-induced SEUs on a COTS 28-nm SRAM-based FPGA under Different Incident Angles.
LATS
Juan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente
2020 J jnl
Analytical reliability estimation of SRAM-based FPGA designs against single-bit and multiple-cell upsets.
Reliab. Eng. Syst. Saf.
Reza Ramezani, Juan Antonio Clemente, Francisco J. Franco
2020 J jnl
Impact of Ground-Level Enhancement (GLE) Solar Events on Soft Error Rate for Avionics.
IEEE Trans. Aerosp. Electron. Syst.
Guillaume Hubert, Sébastien Aubry, Juan Antonio Clemente
2018 J jnl
A decomposition-based reliability and makespan optimization technique for hardware task graphs.
Reliab. Eng. Syst. Saf.
Reza Ramezani, Yasser Sedaghat, Mahmoud Naghibzadeh, Juan Antonio Clemente
2018 J jnl
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array.
IET Comput. Digit. Tech.
Javier Olivito, Felipe Serrano, Juan Antonio Clemente, Hortensia Mecha, Javier Resano
2017 J jnl
Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch.
IEEE Trans. Very Large Scale Integr. Syst.
Reza Ramezani, Yasser Sedaghat, Juan Antonio Clemente
2017 J jnl
Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms.
IEEE Trans. Aerosp. Electron. Syst.
Reza Ramezani, Yasser Sedaghat, Mahmoud Naghibzadeh, Juan Antonio Clemente
2016 J jnl
Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Juan Antonio Clemente, Ruben Gran, Abel Chocano, Carlos del Prado, Javier Resano
2016 J jnl
Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs.
Neurocomputing
Juan Antonio Clemente, Wassim Mansour, Rafic Ayoubi, Felipe Serrano, Hortensia Mecha, Haissam Ziade, Wassim El Falou, Raoul Velazco
2014 J jnl
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms.
ACM Trans. Reconfigurable Technol. Syst.
Juan Antonio Clemente, Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
2014 J jnl
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems.
ACM Trans. Embed. Comput. Syst.
Juan Antonio Clemente, Javier Resano, Daniel Mozos
2014 J jnl
Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Juan Antonio Clemente, Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor
2011 J jnl
A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Juan Antonio Clemente, Javier Resano, Carlos González, Daniel Mozos
2011 B conf
A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware.
FPL
Juan Antonio Clemente, Vincenzo Rana, Donatella Sciuto, Ivan Beretta, David Atienza
2011 — conf
A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems.
IPDPS Workshops
Juan Antonio Clemente, Daniel Mozos, Javier Resano
2010 J jnl
A task graph execution manager for reconfigurable multi-tasking systems.
Microprocess. Microsystems
Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos
2008 — conf
A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems.
ReConFig
Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos
2008 J jnl
Efficiently scheduling runtime reconfigurations.
ACM Trans. Design Autom. Electr. Syst.
Javier Resano, Juan Antonio Clemente, Carlos González, Daniel Mozos, Francky Catthoor
2007 — conf
HW implementation of an execution manager for reconfigurable systems.
ERSA
Javier Resano, Juan Antonio Clemente, Carlos González, Jose Luis Garcia, Daniel Mozos