João C. Vital

20 papers A 1C 3Misc 1Journal 5Unranked 10
YearRankTypeTitle / Venue / Authors
2006 — conf
A 90nm CMOS 1.2v 6b 1GS/s two-step subranging ADC.
ISSCC
Pedro M. Figueiredo, Paulo Cardoso, Ana Lopes, Carlos Fachada, Naoyuki Hamanishi, Ken Tanabe, João C. Vital
2006 J jnl
Kickback noise reduction techniques for CMOS latched comparators.
IEEE Trans. Circuits Syst. II Express Briefs
Pedro M. Figueiredo, João C. Vital
2004 J jnl
Averaging technique in flash analog-to-digital converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pedro M. Figueiredo, João C. Vital
2004 — conf
Low kickback noise techniques for CMOS latched comparators.
ISCAS (1)
Pedro M. Figueiredo, João C. Vital
2004 — conf
Termination of averaging networks in flash ADCs.
ISCAS (1)
Pedro M. Figueiredo, João C. Vital
2004 J jnl
The MOS capacitor amplifier.
IEEE Trans. Circuits Syst. II Express Briefs
Pedro M. Figueiredo, João C. Vital
2003 — conf
Analysis of the averaging technique in flash ADCs.
ISCAS (1)
Pedro M. Figueiredo, João C. Vital
2002 — conf
A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB.
ICECS
Jorge Guilherme, João C. Vital, José E. Franca
2001 A conf
A Skill-based library for retargetable embedded analog cores.
DATE
Jingnan Xu, João C. Vital, Nuno Horta
2001 — conf
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications.
ISCAS (1)
Jorge Guilherme, Pedro M. Figueiredo, Pedro Azevedo, Goncalo Minderico, Antonio Leal, João C. Vital, José E. Franca
2001 — conf
A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction.
ICECS
Jorge Guilherme, João C. Vital, José E. Franca
2001 — conf
Design considerations for high resolution pipeline ADCs in digital CMOS technology.
ICECS
Jorge Guilherme, Pedro M. Figueiredo, Pedro Azevedo, Goncalo Minderico, Antonio Leal, João C. Vital, José E. Franca
2001 — conf
IC design automation from circuit level optimization to retargetable layout.
ICECS
Jingnan Xu, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca
1999 — conf
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design.
ICECS
José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos
1995 C conf
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration.
ISCAS
João Goes, João C. Vital, José E. Franca
1993 J jnl
A CMOS analog-digital audio processor for a portable radiotelephone.
IEEE J. Solid State Circuits
Jorge Guilherme, F. P. Martins, João C. Vital, José E. Franca
1993 C conf
A Concurrent Two-step Flash Analogue-to-digital Converter Architecture.
ISCAS
João C. Vital, José E. Franca
1993 C conf
Fully-digital Testability of a High-speed Conversion System.
ISCAS
João C. Vital, José E. Franca, Nuno S. Silva
1993 Misc conf
High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities.
VLSI Design
João C. Vital, José E. Franca
1990 J jnl
Integrated mixed-mode digital-analog filter converters.
IEEE J. Solid State Circuits
João C. Vital, José E. Franca, Franco Maloberti