José Luis Huertas

42 papers A* 1A 2B 1C 2Misc 3Journal 18Unranked 15
YearRankTypeTitle / Venue / Authors
2016 — conf
Cell-culture measurements using voltage oscillations.
LASCAS
Andrés Maldonado, Gloria Huertas, Adoración Rueda, José Luis Huertas, Pablo Pérez, Alberto Yufera
2015 J jnl
The Bio-Oscillator: A Circuit for Cell-Culture Assays.
IEEE Trans. Circuits Syst. II Express Briefs
Gloria Huertas, Andrés Maldonado, Alberto Yufera, Adoración Rueda, José Luis Huertas
2012 — conf
Multi-condition alternate test of analog, mixed-signal, and RF systems.
LATW
Manuel J. Barragan Asian, Gildas Léger, José Luis Huertas
2010 — conf
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems.
DELTA
Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas
2010 B conf
Low-cost signature test of RF blocks based on envelope response analysis.
ETS
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
2009 — conf
A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis.
Asian Test Symposium
Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
2008 — conf
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model.
SBCCI
Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda, José Luis Huertas
2008 — conf
Oscillation-Based Test in Data Converters: On-Line Monitoring.
DELTA
Gloria Huertas, José Luis Huertas
2007 — conf
Total ionizing dose effects in switched-capacitor filters using oscillation-based test.
SBCCI
John M. Espinosa-Duran, Jaime Velasco-Medina, Gloria Huertas, José Luis Huertas
2005 J jnl
Guest Editorial.
J. Electron. Test.
Adoración Rueda, Michel Renovell, José Luis Huertas
2005 J jnl
Low-Voltage CMOS subthreshold log-domain filtering.
IEEE Trans. Circuits Syst. I Regul. Pap.
Francisco Serra-Graells, José Luis Huertas
2005 J jnl
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST.
J. Electron. Test.
Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas
2004 J jnl
A true-1-V 300-μW CMOS-subthreshold log-domain hearing-aid-on-chip.
IEEE J. Solid State Circuits
Francisco Serra-Graells, Lluís Gómez, José Luis Huertas
2004 J jnl
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gildas Léger, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2004 — conf
Test and Design-for-Test of Mixed-Signal Integrated Circuits.
IFIP Congress Tutorials
Marcelo Lubaszewski, José Luis Huertas
2004 — conf
Test and design-for-test of mixed-signal integrated circuits.
SBCCI
José Luis Huertas
2003 J jnl
Sub-1-V CMOS proportional-to-absolute temperature references.
IEEE J. Solid State Circuits
Francisco Serra-Graells, José Luis Huertas
2002 J jnl
COPAS: A New Algorithm for the Partial Input Encoding Problem.
VLSI Design
Manuel Martínez, Maria José Avedillo, José M. Quintana, José Luis Huertas
2002 J jnl
Practical Oscillation-Based Test of Integrated Filters.
IEEE Des. Test Comput.
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2002 J jnl
Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell.
IEEE Des. Test Comput.
Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2001 J jnl
Efficient Realization of a Threshold Voter for Self-Purging Redundancy.
J. Electron. Test.
José M. Quintana, Maria J. Avedillo, José Luis Huertas
2001 J jnl
New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters.
J. Electron. Test.
Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2000 — conf
Mixed-Signal SoC Testing: Is Mixed-Signal Design-for-Test on Its Way.
Asian Test Symposium
Chin-Long Wey, Adam Osseiran, José Luis Huertas, Yeon-Chen Nieu
1999 J jnl
Self-Timed Boundary-Scan Cells for Multi-Chip Module Test.
J. Electron. Test.
T. A. García, Antonio J. Acosta, J. M. Mora, J. Ramos, José Luis Huertas
1998 J jnl
A high-Q bandpass fully differential SC filter with enhanced testability.
IEEE J. Solid State Circuits
Diego Vázquez, Adoración Rueda, José Luis Huertas, Eduardo J. Peralías
1998 A conf
Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems.
DATE
Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas
1997 — conf
A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs.
ED&TC
Juan A. Prieto, Adoración Rueda, José M. Quintana, José Luis Huertas
1997 J jnl
Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits.
IEEE Trans. Fuzzy Syst.
Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga, José Luis Huertas
1997 A* conf
SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems.
DAC
Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas
1995 J jnl
Constrained state assignment of easily testable FSMs.
J. Electron. Test.
Maria J. Avedillo, José M. Quintana, José Luis Huertas
1995 A conf
Statistical behavioral modeling and characterization of A/D converters.
ICCAD
Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
1994 — conf
A Real Time Clustering CMOS Neural Engine.
NIPS
Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, José Luis Huertas
1994 Misc conf
A new strategy for testing analog filters.
VTS
Diego Vázquez, Adoración Rueda, José Luis Huertas
1993 C conf
A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques.
ISCAS
Servando Espejo-Meana, Ángel Rodríguez-Vázquez, Rafael Domínguez-Castro, Bernabé Linares-Barranco, José Luis Huertas
1993 C conf
A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch.
ISCAS
Manuel J. Bellido, Manuel Valencia-Barrero, Antonio J. Acosta, Angel Barriga, José Luis Huertas, Rafael Domínguez-Castro
1993 J jnl
Improving the testability of switched-capacitor filters.
J. Electron. Test.
José Luis Huertas, Adoración Rueda, Diego Vázquez
1992 J jnl
Analog neural programmable optimizers in CMOS VLSI technologies.
IEEE J. Solid State Circuits
Rafael Domínguez-Castro, Ángel Rodríguez-Vázquez, José Luis Huertas, Edgar Sánchez-Sinencio
1992 Misc conf
On-line testing of switched-capacitor filters.
VTS
José Luis Huertas, Diego Vázquez, Adoración Rueda
1991 Misc conf
CMOS Continuous BAM With On Chip Learning.
IWANN
Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José Luis Huertas
1990 — conf
A new method for the state reduction of incompletely specified finite sequential machines.
EURO-DAC
Maria J. Avedillo, José M. Quintana, José Luis Huertas
1978 — conf
On the synthesis of multivalued circuits using principally binary elements.
MVL
José Luis Huertas, José I. Acha, L. Macias
1978 — conf
Theory and design of multivalued memory elements.
MVL
José Luis Huertas, José I. Acha, G. Sanchez Gomez