José Luis González

29 papers A 3C 3Journal 10Unranked 13
YearRankTypeTitle / Venue / Authors
2023 — conf
Minimum Signal-To-Noise Ratio For High Classification Radar Accuracy.
ICECS
Nouhaila Rzaik, Cédric Dehos, Mykhailo Zarudniev, Alexandre Siligaris, José Luis González
2017 J jnl
Industry Perspectives.
IEEE Wirel. Commun.
Antonio De Domenico, Robin Gerzaguet, Nicolas Cassiau, Antonio Clemente, Raffaele D'Errico, Cedric Dehos, José Luis González, Dimitri Ktenas, L. Manat, Valentin Savin, Alexandre Siligaris
2015 — conf
A 45GHz/55GHz LO frequency selector for E-band transceivers based on switchable injection locked-oscillators in BiCMOS 55nm.
ESSCIRC
José Luis González, Vincent Puyal, Alexandre Siligaris, Clement Jany, Cedric Dehos
2014 J jnl
Electro-thermal characterization of a differential temperature sensor in a 65 nm CMOS IC: Applications to gain monitoring in RF amplifiers.
Microelectron. J.
Josep Altet, José Luis González, Didac Gómez, Xavier Perpiñà, Wilfrid Claeys, Stéphane Grauby, Cédric Dufis, Miquel Vellvehí, Diego Mateo, Ferran Reverter, Stefan Dilhaire, Xavier Jordà
2014 J jnl
Millimeter-wave access and backhauling: the solution to the exponential data traffic increase in 5G mobile communications systems?
IEEE Commun. Mag.
Cedric Dehos, José Luis González, Antonio De Domenico, Dimitri Ktenas, Laurent Dussopt
2014 — conf
Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes.
MWSCAS
Josep Altet, Eduardo Aldrete-Vidrio, Ferran Reverter, Didac Gómez, José Luis González, Marvin Onabajo, José Silva-Martínez, B. Martineau, X. Perpiñà, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Xavier Aragonès, Xavier Jordà, Miquel Vellvehí, Stefan Dilhaire, Salvador Mir, Diego Mateo
2013 J jnl
Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noise.
Microelectron. J.
Marc Molina, Xavier Aragonès, Diego Mateo, José Luis González
2012 — conf
Design of a fully integrated CMOS self-testable RF power amplifier using a thermal sensor.
ESSCIRC
Nathalie Deltimple, José Luis González, Josep Altet, Yohann Luque, Eric Kerherve
2012 J jnl
Electro-thermal coupling analysis methodology for RF circuits.
Microelectron. J.
Didac Gómez, Cédric Dufis, Josep Altet, Diego Mateo, José Luis González
2012 J jnl
On the electrical properties of slotted metallic planes in CMOS processes for RF and millimeter-wave applications.
Microelectron. J.
José Luis González, Baudouin Martineau, Didier Belot
2010 — conf
A comparison between grounded and floating shield inductors for mmW VCOs.
ESSCIRC
José Luis González, Xavier Aragonès, Marc Molina, Baudouin Martineau, Didier Belot
2010 C conf
Behavioural Modelling of DLLs for Fast Simulation and Optimisation of Jitter and Power Consumption.
DSD
Enrique Barajas, Diego Mateo, José Luis González
2009 — conf
Experimental analysis of substrate isolation techniques for RF-SOC integration.
SoCC
Marc Molina, Xavier Aragonès, José Luis González
2008 C conf
A low-power RF front-end for 2.5 GHz receivers.
ISCAS
Laura Moreno, Didac Gómez, José Luis González, Diego Mateo, Xavier Aragonès, Roc Berenguer, Héctor Solar
2007 A conf
Interactive presentation: Behavioral modeling of delay-locked loops and its application to jitter optimization in ultra wide-band impulse radio systems.
DATE
Enrique Barajas, R. Cosculluela, D. Coutinho, Diego Mateo, José Luis González, I. Cairò, S. Banda, M. Ikeda
2006 C conf
Observation of high-frequency analog/RF electrical circuit characteristics by on-chip thermal measurements.
ISCAS
Josep Altet, Diego Mateo, José Luis González, Eduardo Aldrete-Vidrio
2005 J jnl
An investigation on the relation between digital circuitry characteristics and power supply noise spectrum in mixed-signal CMOS integrated circuits.
Microelectron. J.
Miguel A. Méndez, José Luis González, Diego Mateo, Antonio Rubio
2005 — conf
Asynchronous pulse logic cell for threshold logic and Boolean networks.
ISCAS (1)
Johan Lambie, Francesc Moll Echeto, José Luis González, Antonio Rubio
2005 — conf
Characterization and noise analysis of a 12-bit current steering digital-to-analog converter.
ISCAS (1)
Tomás Lahoz, Enrique Barajas, José Luis González
2005 — conf
Discrete and continuous substrate noise spectrum dependence on digital circuit characteristics.
ISCAS (5)
Enrique Barajas, Luis Elvira, Miguel A. Méndez, Ferran Martorell, Diego Mateo, José Luis González
2005 — conf
Phase noise degradation of LC-tank VCOs due to substrate noise and package coupling.
ESSCIRC
Miguel A. Méndez, Diego Mateo, Xavier Aragonès, José Luis González
2004 A conf
A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation.
DATE
Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González
2004 J jnl
A physical-based noise macromodel for fast simulation of switching noise generation.
Microelectron. J.
Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González
2004 — conf
Increasing the capacity of RAID5 by online gradual assimilation.
SNAPI@PACT
José Luis González, Toni Cortes
2004 J jnl
Mismatch and dynamic modeling of current sources in current-steering CMOS D/A converters: an extended design procedure.
IEEE Trans. Circuits Syst. I Regul. Pap.
Miquel Albiol, José Luis González, Eduard Alarcón
2003 A conf
Improved Design Methodology for High-Speed High-Accuracy Current Steering D/A Converters.
DATE
Miquel Albiol, José Luis González, Eduard Alarcón
2003 — conf
Improved current-source sizing for high-speed high-accuracy current steering D/A converters.
ISCAS (1)
Miquel Albiol, José Luis González, Eduard Alarcón
2002 J jnl
Noise Generation and Coupling Mechanisms in Deep-Submicron ICs.
IEEE Des. Test Comput.
Xavier Aragonès, José Luis González, Francesc Moll, Antonio Rubio
2001 — conf
Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters.
ISCAS (1)
José Luis González, Eduard Alarcón