José Luis Briz

19 papers A 2C 1Journal 11Unranked 5
YearRankTypeTitle / Venue / Authors
2025 J jnl
Characterization of latency and jitter in TSN emulation.
CoRR
Álex Gracia, José Luis Briz, Héctor Blanco-Alcaine, Juan Segarra, Alitzel Galilea Torres-Macías, Antonio Ramírez-Treviño
2022 J jnl
Accounting for Preemption and Migration Costs in the Calculation of Hard Real-Time Cyclic Executives for MPSoCs.
IEEE Robotics Autom. Lett.
Laura Elena Rubio Anguiano, José Luis Briz, Antonio Ramírez-Treviño
2019 J jnl
A Flexible Framework for Real-Time Thermal-Aware Schedulers using Timed Continuous Petri Nets.
Computación y Sistemas
Gaddiel Desirena-Lopez, Laura Elena Rubio Anguiano, Antonio Ramírez-Treviño, José Luis Briz
2019 J jnl
Energy-efficient thermal-aware multiprocessor scheduling for real-time tasks using TCPN.
Discret. Event Dyn. Syst.
Laura Elena Rubio Anguiano, Gaddiel Desirena-Lopez, Antonio Ramírez-Treviño, José Luis Briz
2019 — conf
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer.
WCAE@ISCA
Alejandro Valero, Darío Suárez Gracia, Ruben Gran Tejero, Luis M. Ramos, Agustín Navarro-Torres, Adolfo Muñoz, Joaquín Ezpeleta, José Luis Briz, Ana C. Murillo, Eduardo Montijano, Javier Resano, María Villarroya-Gaudó, Jesús Alastruey-Benedé, Enrique F. Torres, Pedro Álvarez, Pablo Ibáñez, Víctor Viñals
2019 J jnl
Thermal-aware Real-time Scheduling Using Timed Continuous Petri Nets.
ACM Trans. Embed. Comput. Syst.
Gaddiel Desirena-Lopez, Antonio Ramírez-Treviño, José Luis Briz, Carlos Renato Vázquez, David Gómez-Gutiérrez
2018 J jnl
GPU NTC Process Variation Compensation With Voltage Stacking.
IEEE Trans. Very Large Scale Integr. Syst.
Rafael Trapani Possignolo, Elnaz Ebrahimi, Ehsan K. Ardestani, Alamelu Sankaranarayanan, José Luis Briz, Jose Renau
2017 J jnl
Accelerating Board Games Through Hardware/Software Codesign.
IEEE Trans. Comput. Intell. AI Games
Javier Olivito, Javier Resano, José Luis Briz
2016 J jnl
Managing Mismatches in Voltage Stacking with CoreUnfolding.
ACM Trans. Archit. Code Optim.
Ehsan K. Ardestani, Rafael Trapani Possignolo, José Luis Briz, Jose Renau
2016 — conf
On-line scheduling in multiprocessor systems based on continuous control using Timed Continuous Petri Nets.
WODES
Gaddiel Desirena-Lopez, Carlos Renato Vázquez, José Luis Briz, Antonio Ramírez-Treviño, David Gómez-Gutiérrez
2013 A conf
An energy efficient GPGPU memory hierarchy with tiny incoherent caches.
ISLPED
Alamelu Sankaranarayanan, Ehsan K. Ardestani, José Luis Briz, Jose Renau
2011 J jnl
Multi-level Adaptive Prefetching based on Performance Gradient Tracking.
J. Instr. Level Parallelism
Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals
2008 — conf
Low-Cost Adaptive Data Prefetching.
Euro-Par
Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals
2007 J jnl
Data prefetching in a cache hierarchy with high bandwidth and capacity.
SIGARCH Comput. Archit. News
Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals
2006 — conf
Data prefetching in a cache hierarchy with high bandwidth and capacity.
MEDEA@PACT
Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals
2006 J jnl
Software Demand, Hardware Supply.
IEEE Micro
Jesús Alastruey, José Luis Briz, Pablo Ibáñez, Víctor Viñals
2001 C conf
Hardware Prefetching in Bus-Based Multiprocessors: Pattern Characterization and Cost-Effective Hardware.
PDP
María Jesús Garzarán, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals
1998 A conf
Characterization and Improvement of Load/Store Cache-based Prefetching.
International Conference on Supercomputing
Pablo Ibáñez, Víctor Viñals, José Luis Briz, María Jesús Garzarán
1994 — conf
Implementation of Weighted Place/Transition Nets Based on Linear Enabling Functions.
Application and Theory of Petri Nets
José Luis Briz, José Manuel Colom