José L. Huertas

59 papers A 10B 1C 8Misc 7Journal 18Unranked 15

Year	Rank	Type	Title / Venue / Authors
2015	—	`conf`	From voltage oscillations to tissue-impedance measurements. BioCAS Andrés Maldonado, Pablo Pérez, Gloria Huertas, Alberto Yufera, Adoración Rueda, José L. Huertas
2012	B	`conf`	OBT for settling error test of sampled-data systems using signal-dependent clocking. ETS Manuel J. Barragan Asian, Gildas Léger, José L. Huertas
2011	J	`jnl`	Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures. J. Electron. Test. Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
2011	—	`conf`	Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs. Asian Test Symposium Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
2007	—	`conf`	Total Ionizing Dose Effects in Switched-Capacitor Filters using Oscillation-Based Test. ICECS John M. Espinosa-Duran, Jaime Velasco-Medina, Gloria Huertas, José L. Huertas
2005	—	`conf`	Robust frequency divider based on resonant tunneling devices. ISCAS (3) Maria J. Avedillo, José M. Quintana, José L. Huertas
2004	A	`conf`	A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. DATE Diego Vázquez, Gildas Léger, Gloria Huertas, Adoración Rueda, José L. Huertas
2003	J	`jnl`	Oscillation-based test in bandpass oversampled A/D converters. Microelectron. J. Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
2002	—	`conf`	Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits. LATW Diego Vázquez, Gloria Huertas, Adoración Rueda, Gildas Léger, José L. Huertas
2002	—	`conf`	Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. DELTA Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
2002	Misc	`conf`	Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. VTS Diego Vázquez, Gloria Huertas, Gildas Léger, Adoración Rueda, José L. Huertas
2002	—	`conf`	Practical solutions for the application of the oscillation-based-test in analog integrated circuits. ISCAS (1) Diego Vázquez, Gloria Huertas, Gildas Léger, Adoración Rueda, José L. Huertas
2002	—	`conf`	Simplified Reed-Muller expressions for residue threshold functions. ISCAS (4) José M. Quintana, Maria J. Avedillo, José L. Huertas
2001	Misc	`conf`	Self-Testable Pipelined ADC with Low Hardware Overhead. VTS Eduardo J. Peralías, Gloria Huertas, Adoración Rueda, José L. Huertas
2001	—	`conf`	Structural testing of pipelined analog to digital converters. ISCAS (1) Eduardo J. Peralías, Adoración Rueda, José L. Huertas
2000	A	`conf`	A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. DATE Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
2000	—	`conf`	Alternative DFT Strategies for High-Speed Pipelined Data Converters. LATW Eduardo J. Peralías, Adoración Rueda, José L. Huertas
2000	Misc	`conf`	Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. VLSI Design Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
2000	—	`conf`	Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. Asian Test Symposium Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas
2000	C	`conf`	VHDL-based behavioural description of pipeline ADCs. ISCAS Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
1999	A	`conf`	An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length. DATE Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas
1999	A	`conf`	Effective oscillation-based test for application to a DTMF filter bank. ITC Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
1998	A	`conf`	A Dynamic Model for the State Assignment Problem. DATE Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas
1998	A	`conf`	An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. DATE Juan A. Prieto, Adoración Rueda, Ian Andrew Grout, Eduardo J. Peralías, José L. Huertas, Andrew Mark David Richardson
1998	—	`conf`	CMOS pipelined A/D converters with concurrent error detection capability. ICECS Eduardo J. Peralías, Adoración Rueda, José L. Huertas
1998	A	`conf`	DfT and on-line test of high-performance data converters: a practical case. ITC Eduardo J. Peralías, Adoración Rueda, Juan A. Prieto, José L. Huertas
1998	Misc	`conf`	Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. VTS T. A. García, Antonio J. Acosta, José L. Huertas, J. M. Mora, J. Ramos
1997	Misc	`conf`	A DFT Technique for Analog-to-Digital Converters with digital correction. VTS Eduardo J. Peralías, Adoración Rueda, José L. Huertas
1997	A	`conf`	Analog and Mixed-Signal Benchmark Circuits-First Release. ITC Bozena Kaminska, Karim Arabi, I. Bell, José L. Huertas, Bruce C. Kim, Adoración Rueda, Mani Soma, Prashant Goteti
1996	J	`jnl`	Integrated circuit implementation of fuzzy controllers. IEEE J. Solid State Circuits José L. Huertas, Santiago Sánchez-Solano, Iluminada Baturone, Angel Barriga
1996	Misc	`conf`	Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. VTS Diego Vázquez, José L. Huertas, Adoración Rueda
1995	C	`conf`	A Tool for Fast Mismatch Analysis of Analog Circuits. ISCAS R. Rodriguez-Macias, Francisco V. Fernández, Ángel Rodríguez-Vázquez, José L. Huertas
1995	Misc	`conf`	A solution for the on-line test of analog ladder filters. VTS Diego Vázquez, Adoración Rueda, José L. Huertas
1995	J	`jnl`	A vertically integrated tool for automated design of ΣΔ modulators. IEEE J. Solid State Circuits Fernando Medeiro, Belén Pérez-Verdú, Ángel Rodríguez-Vázquez, José L. Huertas
1995	J	`jnl`	Modular Asynchronous Arbiter Insensitive to Metastability. IEEE Trans. Computers Manuel Valencia-Barrero, Manuel J. Bellido, José L. Huertas, Antonio J. Acosta, Santiago Sánchez-Solano
1995	—	`conf`	New CMOS VLSI linear self-timed architectures. ASYNC Antonio J. Acosta, Manuel J. Bellido, Manuel Valencia-Barrero, Angel Barriga, Raúl Jiménez, José L. Huertas
1995	—	`conf`	Optimum PLA folding through boolean satisfiability. ASP-DAC José M. Quintana, Maria J. Avedillo, Maria P. Parra, José L. Huertas
1995	J	`jnl`	SODS: a new CMOS differential-type structure. IEEE J. Solid State Circuits Antonio J. Acosta, Manuel Valencia, Angel Barriga, Manuel J. Bellido, José L. Huertas
1994	C	`conf`	A Low-Cost Strategy for Testing Analog Filters. ISCAS Diego Vázquez, Adoración Rueda, José L. Huertas
1994	C	`conf`	A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors. ISCAS Alberto Yufera, Adoración Rueda, José L. Huertas
1994	C	`conf`	An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. ISCAS Juan A. Prieto, José M. Quintana, Adoración Rueda, José L. Huertas
1994	C	`conf`	Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design. ISCAS Fernando Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez, José L. Huertas
1994	J	`jnl`	Programmable switched-current wave analog filters. IEEE J. Solid State Circuits Alberto Yúfera, Adoración Rueda, José L. Huertas
1993	J	`jnl`	A CMOS analog adaptive BAM with on-chip learning and weight refreshing. IEEE Trans. Neural Networks Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José L. Huertas
1993	C	`conf`	A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization. ISCAS Fernando Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez, José L. Huertas
1993	C	`conf`	Easily Testable PLA-based FSMS. ISCAS Maria J. Avedillo, José M. Quintana, José L. Huertas
1993	—	`conf`	Modeling of real bistables in VHDL. EURO-DAC Antonio J. Acosta, Angel Barriga, Manuel Valencia-Barrero, Manuel J. Bellido, José L. Huertas
1993	J	`jnl`	Testable switched-capacitor filters. IEEE J. Solid State Circuits José L. Huertas, Adoración Rueda, Diego Vázquez
1992	J	`jnl`	A modular T-mode design approach for analog neural network hardware implementations. IEEE J. Solid State Circuits Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José L. Huertas
1992	A	`conf`	Accuate simplification of large symbolic formulae. ICCAD Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. D. Martín, José L. Huertas
1992	J	`jnl`	Testability in analogue cellular neural networks. Int. J. Circuit Theory Appl. Adoración Rueda, José L. Huertas
1991	J	`jnl`	A CMOS implementation of FitzHugh-Nagumo neuron model. IEEE J. Solid State Circuits Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José L. Huertas
1991	J	`jnl`	CMOS OTA-C high-frequency sinusoidal oscillators. IEEE J. Solid State Circuits Bernabé Linares-Barranco, Ángel Rodríguez-Vázquez, Edgar Sánchez-Sinencio, José L. Huertas
1990	J	`jnl`	Analysis and design of self-limiting single-OP-AMPRC oscillators. Int. J. Circuit Theory Appl. José L. Huertas, Belén Pérez-Verdú, Ángel Rodríguez-Vázquez
1988	A	`conf`	A new method for the efficient state-assignment of PLA-based sequential machines. ICCAD José L. Huertas, José M. Quintana
1988	J	`jnl`	A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements. IEEE J. Solid State Circuits Belén Pérez-Verdú, José L. Huertas, Ángel Rodríguez-Vázquez
1987	J	`jnl`	Chaos from switched-capacitor circuits: Discrete maps. Proc. IEEE Ángel Rodríguez-Vázquez, José L. Huertas, Adoración Rueda, Belén Pérez-Verdú, Leon O. Chua
1976	J	`jnl`	On Input and Next-State Equations of the IEEE Trans. Computers José I. Acha, José L. Huertas
1976	J	`jnl`	Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function. IEEE Trans. Computers José L. Huertas, José I. Acha