José González

57 papers A* 7A 12B 2C 9Misc 3Journal 16Unranked 8

Year	Rank	Type	Title / Venue / Authors
2013	J	`jnl`	Thread Row Buffers: Improving Memory Performance Isolation and Throughput in Multiprogrammed Environments. IEEE Trans. Computers Enric Herrero, José González, Ramon Canal, Dean M. Tullsen
2012	J	`jnl`	Distributed Cooperative Caching: An Energy Efficient Memory Scheme for Chip Multiprocessors. IEEE Trans. Parallel Distributed Syst. Enric Herrero, José González, Ramon Canal
2011	J	`jnl`	CROB: Implementing a Large Instruction Window through Compression. Trans. High Perform. Embed. Archit. Compil. Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González
2011	A	`conf`	Thread shuffling: combining DVFS and thread migration toreduce energy consumptions for multi-core systems. ISLPED Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González
2010	A*	`conf`	Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors. ISCA Enric Herrero, José González, Ramon Canal
2010	J	`jnl`	Energy efficiency via thread fusion and value reuse. IET Comput. Digit. Tech. Ryan N. Rakvic, José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Antonio González
2010	—	`conf`	Power-Efficient Spilling Techniques for Chip Multiprocessors. Euro-Par (1) Enric Herrero, José González, Ramon Canal
2010	J	`jnl`	Thread-management techniques to maximize efficiency in multicore and simultaneous multithreaded microprocessors. ACM Trans. Archit. Code Optim. Ryan N. Rakvic, Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González
2009	J	`jnl`	A lossy 3D wavelet transform for high-quality compression of medical video. J. Syst. Softw. Gregorio Bernabé, José M. García, José González
2009	A	`conf`	Dynamic thermal management using thin-film thermoelectric cooling. ISLPED Pedro Chaparro, José González, Qiong Cai, Greg Chrysler
2008	A	`conf`	A software-hardware hybrid steering mechanism for clustered microarchitectures. IPDPS Qiong Cai, Josep M. Codina, José González, Antonio González
2008	B	`conf`	Distributed cooperative caching. PACT Enric Herrero, José González, Ramon Canal
2008	A	`conf`	Efficient resources assignment schemes for clustered multithreaded processors. IPDPS Fernando Latorre, José González, Antonio González
2008	B	`conf`	Meeting points: using thread criticality to adapt multicore hardware to parallel regions. PACT Qiong Cai, José González, Ryan N. Rakvic, Grigorios Magklis, Pedro Chaparro, Antonio González
2008	A	`conf`	Thread fusion. ISLPED José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Ryan N. Rakvic, Antonio González
2007	J	`jnl`	An efficient implementation of a 3D wavelet transform based encoder on hyper-threading technology. Parallel Comput. Gregorio Bernabé, Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio, José González
2007	—	`conf`	Building a large instruction window through ROB compression. MEDEA@PACT Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González
2007	J	`jnl`	Understanding the Thermal Implications of Multi-Core Architectures. IEEE Trans. Parallel Distributed Syst. Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, Antonio González
2006	A	`conf`	Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture. ISLPED Grigorios Magklis, Pedro Chaparro, José González, Antonio González
2005	J	`jnl`	A Two-Level Directory Architecture for Highly Scalable cc-NUMA Multiprocessors. IEEE Trans. Parallel Distributed Syst. Manuel E. Acacio, José González, José M. García, José Duato
2005	A*	`conf`	Distributing the Frontend for Temperature Reduction. HPCA Pedro Chaparro, Grigorios Magklis, José González, Antonio González
2005	J	`jnl`	Reducing 3D Fast Wavelet Transform Execution Time Using Blocking and the Streaming SIMD Extensions. J. VLSI Signal Process. Gregorio Bernabé, José M. García, José González
2004	J	`jnl`	An Architecture for High-Performance Scalable Shared-Memory Multiprocessors Exploiting On-Chip Integration. IEEE Trans. Parallel Distributed Syst. Manuel E. Acacio, José González, José M. García, José Duato
2004	J	`jnl`	Architecture of an automatically tuned linear algebra library. Parallel Comput. Javier Cuenca, Domingo Giménez, José González
2004	A	`conf`	Back-end assignment schemes for clustered multithreaded processors. ICS Fernando Latorre, José González, Antonio González
2004	—	`conf`	Cache organizations for clustered microarchitectures. WMPI José González, Fernando Latorre, Antonio González
2004	C	`conf`	Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay^2. ICCD Grigorios Magklis, José González, Antonio González
2004	J	`jnl`	Late Allocation and Early Release of Physical Registers. IEEE Trans. Computers Teresa Monreal, Víctor Viñals, José González, Antonio González, Mateo Valero
2004	C	`conf`	Thermal-Aware Clustered Microarchitectures. ICCD Pedro Chaparro, José González, Antonio González
2003	C	`conf`	Automatic Optimisation of Parallel Linear Algebra Routines in Systems with Variable Load. PDP Javier Cuenca, Domingo Giménez, José González, Jack J. Dongarra, Kenneth Roche
2003	C	`conf`	Dynamic Cluster Resizing. ICCD José González, Antonio González
2003	Misc	`conf`	Empirical Modelling of Parallel Linear Algebra Routines. PPAM Javier Cuenca, Luis-Pedro García, Domingo Giménez, José González, Antonio M. Vidal
2003	A*	`conf`	Power-Aware Control Speculation through Selective Throttling. HPCA Juan L. Aragón, José González, Antonio González
2003	C	`conf`	Reducing 3D Wavelet Transform Execution Time through the Streaming SIMD Extensions. PDP Gregorio Bernabé, José M. García, José González
2002	A	`conf`	A Novel Approach to Reduce L2 Miss Latency in Shared-Memory Multiprocessors. IPDPS Manuel E. Acacio, José González, José M. García, José Duato
2002	A	`conf`	Dual path instruction processing. ICS Juan L. Aragón, José González, Antonio González, James E. Smith
2002	—	`conf`	Memory Conscious 3D Wavelet Transform. EUROMICRO Gregorio Bernabé, José González, José M. García, José Duato
2002	A	`conf`	Owner prediction for accelerating cache-to-cache transfer misses in a cc-NUMA architecture. SC Manuel E. Acacio, José González, José M. García, José Duato
2002	C	`conf`	Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration. PDP Manuel E. Acacio, José González, José M. García, José Duato
2002	—	`conf`	The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors. IEEE PACT Manuel E. Acacio, José González, José M. García, José Duato
2002	C	`conf`	Towards the Design of an Automatically Tuned Linear Algebra Library. PDP Javier Cuenca, Domingo Giménez, José González
2001	A*	`conf`	A New Scalable Directory Architecture for Large-Scale Multiprocessors. HPCA Manuel E. Acacio, José González, José M. García, José Duato
2001	Misc	`conf`	Confidence Estimation for Branch Prediction Reversal. HiPC Juan L. Aragón, José González, José M. García, Antonio González
2001	J	`jnl`	Control-Flow Speculation through Value Prediction. IEEE Trans. Computers José González, Antonio González
2001	C	`conf`	Modeling the Behaviour of Linear Algebra Algorithms with Message-Passing. PDP Javier Cuenca, Domingo Giménez, José González
2001	C	`conf`	Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow. ICCD Juan L. Aragón, José González, José M. García, Antonio González
2000	J	`jnl`	Dynamic Register Renaming Through Virtual-Physical Registers. J. Instr. Level Parallelism Teresa Monreal, Antonio González, Mateo Valero, José González, Víctor Viñals
1999	—	`conf`	Control-Flow Speculation through Value Prediction for Superscalar Processors. IEEE PACT José González, Antonio González
1999	A*	`conf`	Delaying Physical Register Allocation through Virtual-Physical Registers. MICRO Teresa Monreal, Antonio González, Mateo Valero, José González, Víctor Viñals
1998	J	`jnl`	Data value speculation in superscalar processors. Microprocess. Microsystems José González, Antonio González
1998	—	`conf`	Limits of Instruction Level Parallelism with Data Value Speculation. VECPAR José González, Antonio González
1998	A	`conf`	The Potential of Data Value Speculation to Boost ILP. International Conference on Supercomputing José González, Antonio González
1998	A*	`conf`	Virtual-Physical Registers. HPCA Antonio González, José González, Mateo Valero
1997	—	`conf`	Memory Address Prediction for Data Speculation. Euro-Par José González, Antonio González
1997	A	`conf`	Speculative Execution via Address Prediction and Data Prefetching. International Conference on Supercomputing José González, Antonio González
1997	A*	`conf`	The Design and Performance of a Conflict-Avoiding Cache. MICRO Nigel P. Topham, Antonio González, José González
1997	Misc	`conf`	Virtual registers. HiPC Antonio González, Mateo Valero, José González, Teresa Monreal Arnal