José Alejandro Galaviz-Aguilar

15 papers C 1Journal 13Unranked 1
YearRankTypeTitle / Venue / Authors
2024 J jnl
Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers.
IEEE Embed. Syst. Lett.
José Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, Francisco Falcone
2022 J jnl
A Comparison of Surrogate Behavioral Models for Power Amplifier Linearization under High Sparse Data.
Sensors
José Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, José Ricardo Cárdenas-Valdez, Daniel Santiago Aguila-Torres, Leonardo Flores-Hernández
2022 J jnl
A Crest Factor Reduction Technique for LTE Signals with Target Relaxation in Power Amplifier Linearization.
Sensors
José Ricardo Cárdenas-Valdez, José Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, Everardo Inzunza-González, Leonardo Flores-Hernández
2022 C conf
Reliable comparison for power amplifiers nonlinear behavioral modeling based on regression trees and random forest.
ISCAS
Daniel Santiago Aguila-Torres, José Alejandro Galaviz-Aguilar, José Ricardo Cárdenas-Valdez
2021 J jnl
Automated Driving of GaN Chireix Power Amplifier for the Digital Predistortion Linearization.
IEEE Trans. Circuits Syst. II Express Briefs
José Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, Esteban Tlelo-Cuautle
2020 J jnl
Comparative study of channel estimators for massive MIMO 5G NR systems.
IET Commun.
Diego Fernando Carrera, Cesar Vargas-Rosales, Leyre Azpilicueta, José Alejandro Galaviz-Aguilar
2020 J jnl
FPGA-based system for effective IQ imbalance mitigation of RF power amplifiers.
Int. J. Circuit Theory Appl.
José-Cruz Nuñez Perez, Sergio Alberto Juárez Cazares, José Alejandro Galaviz-Aguilar, Yuma Sandoval Ibarra, Francisco Javier Pérez-Pinal, Esteban Tlelo-Cuautle
2020 J jnl
Performance Improvement for Multi-User Millimeter-Wave Massive MIMO Systems.
IEEE Access
Diego Fernando Carrera, Cesar Vargas-Rosales, Rafaela Villalpando Hernandez, José Alejandro Galaviz-Aguilar
2020 J jnl
RF-PA Modeling of PAPR: A Precomputed Approach to Reinforce Spectral Efficiency.
IEEE Access
José Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, Esteban Tlelo-Cuautle
2019 J jnl
Comparison of a genetic programming approach with ANFIS for power amplifier behavioral modeling and FPGA implementation.
Soft Comput.
José Alejandro Galaviz-Aguilar, Patrick Roblin, José Ricardo Cárdenas-Valdez, Emigdio Z.-Flores, Leonardo Trujillo, José-Cruz Nuñez Pérez, Oliver Schütze
2015 J jnl
Modeling memory effects in RF power amplifiers applied to a digital pre-distortion algorithm and emulated on a DSP-FPGA board.
Integr.
José Ricardo Cárdenas-Valdez, José-Cruz Nuñez Pérez, José Alejandro Galaviz-Aguilar, Andrés Calvillo-Téllez, Christian Gontrand, J. Apolinar Reynoso-Hernández, Esteban Tlelo-Cuautle
2014 J jnl
Design and Hardware Implementation of Digital Amplitude Modulation on FPGA.
Res. Comput. Sci.
José Alejandro Galaviz-Aguilar, J. Apolinar Reynoso-Hernández, José-Cruz Nuñez Pérez, José Ricardo Cárdenas-Valdez
2014 J jnl
FPGA Implementation of behavioral Models for RF Power Amplifiers.
Res. Comput. Sci.
Andrés Calvillo-Téllez, Christian Gontrand, José Alejandro Galaviz-Aguilar, José-Cruz Nuñez Pérez, José Ricardo Cárdenas-Valdez
2014 — conf
Measure-based modeling and FPGA implementation of RF Power Amplifier using a multi-layer perceptron neural network.
CONIELECOMP
José-Cruz Nuñez Pérez, José Ricardo Cárdenas-Valdez, José Alejandro Galaviz-Aguilar, Christian Gontrand, B. Goral, Jacques Verdier
2012 J jnl
Design and harware implementation of Memory-Polynomial Model based on DSP Board.
Res. Comput. Sci.
Andrés Calvillo-Téllez, Christian Gontrand, José Alejandro Galaviz-Aguilar, José-Cruz Nuñez Pérez, José Ricardo Cárdenas-Valdez