Joseph T. Rahmeh

14 papers A* 4A 1C 3Journal 4Unranked 1
YearRankTypeTitle / Venue / Authors
1993 J jnl
Concurrent Hierarchical and Multilevel Simulation of VLSI Circuits.
Simul.
Robert B. Mueller-Thuns, Joseph T. Rahmeh, Jacob A. Abraham, Jalal A. Wehbeh, Daniel G. Saab
1993 A* conf
Evaluation of Parts by Mixed-Level DC-Connected Components in Logic Simulation.
DAC
Dah-Cherng Yuan, Lawrence T. Pillage, Joseph T. Rahmeh
1992 A* conf
Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation.
ASPLOS
Shien-Tai Pan, Kimming So, Joseph T. Rahmeh
1991 C conf
Interlock Schemes for Micropiplines: Application to a Self-Timed Rebound Sorter.
ICCD
Sankaran Karthik, Indira de Souza, Joseph T. Rahmeh, Jacob A. Abraham
1990 J jnl
Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor.
IEEE Trans. Computers
Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Vijay Balasubramanian, Jacob A. Abraham
1990 C conf
Fault grading of large digital systems.
ICCD
Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Joseph T. Rahmeh, Jacob A. Abraham
1990 J jnl
Hierarchical multi-level fault simulation of large systems.
J. Electron. Test.
Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Joseph T. Rahmeh, Jacob A. Abraham
1989 A* conf
Automatic Generation of Behavioral Models from Switch-Level Descriptions.
DAC
David T. Blaauw, Daniel G. Saab, Robert B. Mueller-Thuns, Jacob A. Abraham, Joseph T. Rahmeh
1989 C conf
Parallel-concurrent fault simulation.
ICCD
Daniel G. Saab, Ibrahim N. Hajj, Joseph T. Rahmeh
1988 — conf
An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor.
FTCS
Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Jacob A. Abraham
1988 A conf
CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits.
ICCAD
Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Jacob A. Abraham, Joseph T. Rahmeh
1988 — —
Measurement-Based Performance Models of Numerical Problems on Loosely-Coupled Systems
Joseph T. Rahmeh
1986 J jnl
FAUST: An MOS Fault Simulator with Timing Information.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hsi-Ching Shih, Joseph T. Rahmeh, Jacob A. Abraham
1985 A* conf
TIDBITS: Speedup Via Time-Delay Bit-Slicing in ALU Design for VLSI Technology.
ISCA
Peter Y.-T. Hsu, Joseph T. Rahmeh, Edward S. Davidson, Jacob A. Abraham