Joseph Shor

41 papers A 1C 6Journal 24Unranked 10
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 0.0106 mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Asaf Feldman, Joseph Shor
2024 J jnl
A Fully Integrated, Switched-Capacitor DC-DC Buck Converter Featuring an Inverter-Based Comparator.
IEEE Access
Edi Emanovic, Drazen Jurisic, Joseph Shor
2024 J jnl
An 11uW, 0.08 mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Yizhak Shifman, Joseph Shor
2024 — conf
Verilog-A Modelling of Electrochemical Sensors for Combined Simulation of Biosensors and Interfaces.
IEEE SENSORS
Aakash Jog, Ankit Guptal, Ariel Shapira, Yizhak Shifman, Pinchas Tandeitnik, Joseph Shor, Yosi Shacham-Diamand
2024 J jnl
Voltage Level Detection for Near-V
IEEE J. Solid State Circuits
Asaf Feldman, Omer Nechushtan, Joseph Shor
2023 — conf
A 0.0106 mm
ESSCIRC
Asaf Feldman, Joseph Shor
2022 — conf
A 385mV, 270nW, Accurate Voltage Level Detector for IoT.
ESSCIRC
Omer Nechushtan, Asaf Feldman, Joseph Shor
2022 J jnl
A 700-μm², Ring-Oscillator-Based Thermal Sensor in 16-nm FinFET.
IEEE Trans. Very Large Scale Integr. Syst.
Yosef Lempel, Rinat Breuer, Joseph Shor
2022 J jnl
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic.
IEEE J. Solid State Circuits
Yizhak Shifman, Inbal Stanger, Netanel Shavit, Ramiro Taco, Alexander Fish, Joseph Shor
2022 J jnl
A Resistor-Less nW-Level Bandgap Reference With Fine-Grained Voltage and Temperature Coefficient Trims.
IEEE Open J. Circuits Syst.
Ori Bass, Asaf Feldman, Joseph Shor
2022 C conf
Mirror
ISCAS
Yizhak Shifman, Alexander Fish, Joseph Shor
2022 J jnl
Preselection Methods to Achieve Very Low BER in SRAM-Based PUFs - A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs
Yizhak Shifman, Joseph Shor
2021 J jnl
A 5800 μm² Process Monitor Circuit for Measurement of in-Die Variation of V
IEEE Trans. Circuits Syst. II Express Briefs
Liron Lisha, Ori Bass, Joseph Shor
2021 J jnl
A 8800 μm² CCO-Based Voltage-Droop and Temperature Detector in 65 nm.
IEEE Access
Amir Mizrahi, Yizhak Shifman, Joseph Shor
2021 C conf
A Subthreshold Voltage Reference with Coarse- Fine Voltage Trimming.
ISCAS
David Zagouri, Joseph Shor
2021 — conf
An Inverter-Based, Ultra-Low Power, Fully Integrated, Switched-Capacitor DC-DC Buck Converter.
ESSCIRC
Edi Emanovic, Joseph Shor, Drazen Jurisic
2020 J jnl
A 2 Bit/Cell Tilting SRAM-Based PUF With a BER of 3.1E-10 and an Energy of 21 FJ/Bit in 65nm.
IEEE Open J. Circuits Syst.
Yizhak Shifman, Avi Miller, Yoav Weizmann, Joseph Shor
2020 J jnl
A Charge Balancing 1450 um
IEEE Trans. Circuits Syst.
Ori Bass, Joseph Shor
2020 J jnl
A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF.
IEEE Access
Yizhak Shifman, Avi Miller, Osnat Keren, Yoav Weizman, Joseph Shor
2020 J jnl
A Miniaturized 0.003 mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Ori Bass, Joseph Shor
2020 J jnl
An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability.
IEEE Trans. Circuits Syst.
Yizhak Shifman, Avi Miller, Osnat Keren, Yoav Weizman, Joseph Shor
2020 J jnl
Ultra Miniature 1850 μm
IEEE Access
Natan Vinshtok-Melnik, Joseph Shor
2019 — conf
A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10.
CICC
Avi Miller, Yizhak Shifman, Yoav Weizman, Osnat Keren, Joseph Shor
2019 C conf
An SRAM PUF with 2 Independent Bits/Cell in 65nm.
ISCAS
Yizhak Shifman, Avi Miller, Yoav Weizman, Alexander Fish, Joseph Shor
2018 J jnl
A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory.
IEEE Trans. Circuits Syst. I Regul. Pap.
Anatoli Mordakhay, Yevgeniy Telepinsky, Lior Klein, Joseph Shor, Alexander Fish
2018 J jnl
Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits
Keith A. Bowman, Muhammad M. Khellah, Takashi Kono, Joseph Shor, Pui-In Mak
2018 J jnl
Miniaturized, 0.01 mm
IEEE J. Solid State Circuits
Anatoli Mordakhay, Joseph Shor
2018 — conf
Ultra-Miniature 0.003 mm
ESSCIRC
Ori Bass, Joseph Shor
2017 C conf
Ultra miniature offset cancelled bandgap reference with ±0.534% inaccuracy from -10°C to 110°C.
ISCAS
Natan Vinshtok-Melnik, Robert Giterman, Joseph Shor
2016 J jnl
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process.
IEEE J. Solid State Circuits
Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd
2016 J jnl
An Accurate Bandgap-Based Power-on-Detector in 14-nm CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs
Joseph Shor, Dror Zilberman
2016 J jnl
Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm.
IEEE J. Solid State Circuits
Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov
2016 — conf
Session 11 overview: Sensors and displays.
ISSCC
Yong Ping Xu, Joseph Shor
2015 — conf
8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm.
ISSCC
Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov
2015 J jnl
Compact BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS Process.
IEEE J. Solid State Circuits
Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, Dror Zilberman
2012 J jnl
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor.
IEEE J. Solid State Circuits
Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler, Eyal Fayneh, Kosta Luria, Michael Zelikson
2012 — conf
Ratiometric BJT-based thermal sensor in 32nm and 22nm technologies.
ISSCC
Joseph Shor, Kosta Luria, Dror Zilberman
2011 — conf
A fully integrated multi-CPU, GPU and memory controller 32nm processor.
ISSCC
Marcelo Yuffe, Ernest Knoll, Moty Mehalel, Joseph Shor, Tsvika Kurts
2010 C conf
Low noise linear voltage regulator for use as an on-chip PLL supply in microprocessors.
ISCAS
Joseph Shor
2010 C conf
Miniaturized CMOS thermal sensor array for temperature gradient measurement in microprocessors.
ISCAS
Kosta Luria, Joseph Shor
1999 A conf
Circuit methods for the integration of low voltage (1.1-1.8V) analog functions on system-on-a-chip IC's in a single-poly CMOS processes.
ISLPED
Vladimir Koifman, Yachin Afek, Joseph Shor