Joseph R. Shinnerl

22 papers A 5Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2023 J jnl
Locality and Utilization in Placement Suboptimality.
CoRR
Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie
2018 — ch.
Large-Scale Global Placement.
Handbook of Approximation Algorithms and Metaheuristics (2)
Jason Cong, Joseph R. Shinnerl
2015 — conf
ISPD 2015 Benchmarks with Fence Regions and Routing Blockages for Detailed-Routing-Driven Placement.
ISPD
Ismail S. Bustany, David G. Chinnery, Joseph R. Shinnerl, Vladimir Yutsis
2015 J jnl
POLAR: A High Performance Mixed-Size Wirelengh-Driven Placer With Density Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tao Lin, Chris C. N. Chu, Joseph R. Shinnerl, Ismail Bustany, Ivailo Nedelchev
2014 — conf
ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement.
ISPD
Vladimir Yutsis, Ismail Bustany, David G. Chinnery, Joseph R. Shinnerl, Wen-Hao Liu
2013 A conf
POLAR: placement based on novel rough legalization and refinement.
ICCAD
Tao Lin, Chris Chu, Joseph R. Shinnerl, Ismail Bustany, Ivailo Nedelchev
2008 — ch.
Enhancing Placement with Multilevel Techniques.
Handbook of Algorithms for Physical Design Automation
Jason Cong, Joseph R. Shinnerl
2007 — ch.
Large-Scale Global Placement.
Handbook of Approximation Algorithms and Metaheuristics
Joseph R. Shinnerl, Jason Cong
2007 — ch.
Locality and Utilization in Placement Suboptimality.
Modern Circuit Placement
Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie
2007 — ch.
mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control.
Modern Circuit Placement
Tony F. Chan, Kenton Sze, Joseph R. Shinnerl, Min Xie
2006 J jnl
Fast floorplanning by look-ahead enabled recursive bipartitioning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jason Cong, Michail Romesis, Joseph R. Shinnerl
2006 — conf
mPL6: enhanced multilevel mixed-size placement.
ISPD
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kenton Sze, Min Xie
2005 — conf
Fast floorplanning by look-ahead enabled recursive bipartitioning.
ASP-DAC
Jason Cong, Michail Romesis, Joseph R. Shinnerl
2005 J jnl
Large-scale circuit placement.
ACM Trans. Design Autom. Electr. Syst.
Jason Cong, Joseph R. Shinnerl, Min Xie, Tim Kong, Xin Yuan
2005 A conf
Robust mixed-size placement under tight white-space constraints.
ICCAD
Jason Cong, Michail Romesis, Joseph R. Shinnerl
2005 — conf
mPL6: a robust multilevel mixed-size placement engine.
ISPD
Tony F. Chan, Jason Cong, Michail Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie
2004 — conf
An area-optimality study of floorplanning.
ISPD
Jason Cong, Gabriele Nataneli, Michail Romesis, Joseph R. Shinnerl
2003 A conf
An Enhanced Multilevel Algorithm for Circuit Placement.
ICCAD
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze
2003 A conf
Large-Scale Circuit Placement: Gap and Promise.
ICCAD
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie, Xin Yuan
2000 A conf
Multilevel Optimization for Large-Scale Circuit Placement.
ICCAD
Tony F. Chan, Jason Cong, Tianming Kong, Joseph R. Shinnerl
1996 J jnl
On the Stability of Cholesky Factorization for Symmetric Quasidefinite Systems.
SIAM J. Matrix Anal. Appl.
Philip E. Gill, Michael A. Saunders, Joseph R. Shinnerl
1996 J jnl
Stability of Symmetric Ill-Conditioned Systems Arising in Interior Methods for Constrained Optimization.
SIAM J. Matrix Anal. Appl.
Anders Forsgren, Philip E. Gill, Joseph R. Shinnerl